ADG467BRS データシートの表示（PDF） - Analog Devices

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ADG467BRS

Octal Channel Protectors

Analog Devices 

TRENCH ISOLATION

The MOS devices that make up the channel protector are

isolated from each other by an oxide layer (trench) (see Figure 26).

When the NMOS and PMOS devices are not electrically

isolated from each other, parasitic junctions between CMOS

transistors may cause latch-up. Latch-up is caused when P-N

junctions that are normally reverse biased become forward

biased, causing large currents to flow, which can be destructive.

ADG467

CMOS devices are normally isolated from each other by

junction isolation. In junction isolation, the N and P wells of the

CMOS transistors form a diode that is reverse biased under

normal operation. However, during overvoltage conditions, this

diode becomes forward biased. A silicon-controlled rectifier

(SCR) type circuit is formed by the two transistors causing a

significant amplification of the current that, in turn, leads to

latch-up. With trench isolation, this diode is removed; the result

is a latch-up-proof circuit.

VG

VG

VSx

VDx

VSx

VDx

T

R

P+

E

N

C

H

N–

P-CHANNEL

P+

T

R

N+

E

N

C

H

P–

BURIED OXIDE LAYER

N-CHANNE L

SUBSTRATE (BACKGATE)

Figure 26. Trench Isolation

N+

T

R

E

N

C

H

Rev. B | Page 11 of 16

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