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74HCT08

Quad 2-Input AND Gate With LSTTL−Compatible Inputs High−Performance Silicon−Gate CMOS

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74HCT08

Quad 2-Input AND Gate

With LSTTL−Compatible Inputs

High−Performance Silicon−Gate CMOS

The 74HCT08 is identical in pinout to the LS08. The device has

TTL−compatible inputs.

Features

• Output Drive Capability: 10 LSTTL Loads

• TTL/NMOS−Compatible Input Levels

• Outputs Directly Interface to CMOS, NMOS and TTL

• Operating Voltage Range: 4.5 to 5.5 V

• Low Input Current: 1.0 mA

• High Noise Immunity Characteristic of CMOS Devices

• In Compliance With the JEDEC Standard No. 7A Requirements

• ESD Performance: HBM > 2000 V; Machine Model > 200 V

• Chip Complexity: 24 FETs or 6 Equivalent Gates

• These are Pb−Free Devices

LOGIC DIAGRAM

1

A1

2

B1

3

Y1

4

A2

5

B2

9

A3

10

B3

6

Y2

Y = AB

8

Y3

12

A4

13

B4

11

Y4

PIN 14 = VCC

PIN 7 = GND

Pinout: 14−Lead Packages (Top View)

VCC B4 A4 Y4 B3 A3 Y3

14 13 12 11 10 9 8

http://onsemi.com

MARKING

DIAGRAMS

14

1

14

SOIC−14

D SUFFIX

CASE 751A

1

HCT08G

AWLYWW

14

1

TSSOP−14

DT SUFFIX

CASE 948G

14

HCT

08

ALYW G

G

1

HCT08 = Device Code

A

= Assembly Location

WL or L = Wafer Lot

Y

= Year

WW or W = Work Week

G or G = Pb−Free Package

(Note: Microdot may be in either location)

FUNCTION TABLE

Inputs

Output

A

B

Y

L

L

L

L

H

L

H

L

L

H

H

H

1234567

A1 B1 Y1 A2 B2 Y2 GND

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 2 of this data sheet.

© Semiconductor Components Industries, LLC, 2009

1

May, 2009 − Rev. 2

Publication Order Number:

74HCT08/D

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