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MH16V644AWJ-5 データシートの表示(PDF) - MITSUBISHI ELECTRIC

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MH16V644AWJ-5 Datasheet PDF : 20 Pages
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Preliminary Spec.
Specifications subject to
change without notice.
MITSUBISHI LSIs
MH16V644AWJ -5, -6
FAST PAGE MODE 1073741824 - BIT ( 16777216 - WORD BY 64 - BIT ) DYNAMIC RAM
Fast Page Mode Cycle (Read, Early Write, Read -Write, Read-Modify-Write Cycle,) (Note 24)
Symbol
Parameter
tPC
tPRWC
tRAS
tCP
tCPRH
tCPWD
Fast page mode read/write cycle time
Fast page mode read write/read modify write cycle time
/RAS low pulse width for read write cycle (Note25)
/CAS high pulse width
(Note26)
/RAS hold time after /CAS precharge
Delay time, /CAS precharge to W low
(Note23)
Limits
-5
Min
Max
-6
Min
Max
35
40
70
75
85 102400
100
102400
5
10
10
15
30
35
30
35
Note 24: All previously specified timing requirements and switching characteristics are applicable to their respective fast page mode cycle.
25: tRAS(min) is specified as two cycles of /CAS input are performed.
26: tCP(max) is specified as a reference point only. If tCP tCP(max),access time is controlled exclusively by tCAC.
Unit
ns
ns
ns
ns
ns
ns
/CAS before /RAS Refresh Cycle (Note 27)
Symbol
Parameter
tCSR
tCHR
tRSR
tRHR
/CAS setup time before /RAS low
/CAS hold time after /RAS low
Read setup time before /RAS low
Read hold time after /RAS low
Limits
-5
Min
Max
-6
Min
Max
5
10
10
10
10
10
10
10
Note 27: Eight or more /CAS before /RAS cycles instead of eight /RAS cycles are necessary for proper operation of /CAS before /RAS refresh
mode.
Unit
ns
ns
ns
ns
MIT-DS-0122-0.0
MITSUBISHI
ELECTRIC
( 9 / 20 )
26/Feb./1997

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