PEX8748 データシートの表示（PDF） - Avago Technologies
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PEX8748 Datasheet PDF : 6 Pages
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PEX 8748, PCI Express Gen 3 Switch, 48 Lanes, 12 Ports
The PEX 8748 can also be configured in Multi-Host mode
where users can choose up to six ports as host/upstream
ports and assign a desired number of downstream ports to
each host. In Multi-Host mode, a virtual switch is created
for each host port and its associated downstream ports
inside the device. The traffic between the ports of a virtual
switch is completely isolated from the traffic in other
virtual switches. Figure 2 illustrates some configurations
of the PEX 8748 in Multi-Host mode where each ellipse
represents a virtual switch inside the device.
The PEX 8748
x8 x8
x8 x4 x4
also provides
several ways to
configure its
registers. The
PEX 8748
PEX 8748
device can be
configured
4 x4 4 x4
2 x4 3 x4 3 x4
through strapping
pins, I2C
3 x4s
4 x4s
interface, host
software, or an
optional serial
PEX 8748
PEX 8748
EEPROM. This
allows for easy
debug during the
9 x4s
8 x4s
development
Figure 2. Multi-Host Port Configurations
phase, performance monitoring during the operation phase,
and driver or software upgrade.
Dual-Host & Failover Support
In Single-Host mode, the PEX 8748 supports a Non-
Transparent (NT) Port, which enables the
implementation of
dual-host systems for
PPrriimmaarryy HHoosstt
SSeeccoonnddaarryy HHoosstt
redundancy and host
CPU
CPU
failover capability. The
NT port allows systems
to isolate host memory
Root
Complex
domains by presenting
the processor subsystem
NT
as an endpoint rather than
another memory
PEX 8748
Non-Transparent
Port
system. Base address End
End
End
registers are used to
Point
Point
Point
translate addresses;
Figure 3. Non-Transparent Port
doorbell registers are used to send interrupts between the
address domains; and scratchpad registers (accessible by
both CPUs) allow inter-processor communication (see
Figure 3).
Multi-Host & Failover Support
In Multi-Host mode, PEX 8748 can be configured with up
to six upstream host ports, each with its own dedicated
downstream ports. The device can be configured for 1+1
redundancy or N+1 redundancy. The PEX 8748 allows the
hosts to communicate their status to each other via special
door-bell registers. In failover mode, if a host fails, the
host designated for failover will disable the upstream port
attached to the failing host and program the downstream
ports of that host to its own domain. Figure 4a shows a two
host system in Multi-Host mode with two virtual switches
inside the device and Figure 4b shows Host 1 disabled
after failure and Host 2 having taken over all of Host 1’s
end-points.
Host 1
Host 2
Host 1
Host 2
PEX 8748
PEX 8748
End End End End
Point Point Point Point
Figure 4a. Multi-Host
End End End End
Point Point Point Point
Figure 4b. Multi-Host Fail-Over
Hot Plug for High Availability
Hot plug capability allows users to replace hardware
modules and perform maintenance without powering down
the system. The PEX 8748 hot plug capability feature
makes it suitable for High Availability (HA)
applications. Three downstream ports include a Standard
Hot Plug Controller. If the PEX 8748 is used in an
application where one or more of its downstream ports
connect to PCI Express slots, each port’s Hot Plug
Controller can be used to manage the hot-plug event of its
associated slot. Every port on the PEX 8748 is equipped
with a hot-plug control/status register to support hot-plug
capability through external logic via the I2C interface.
SerDes Power and Signal Management
The PEX 8748 provides low power capability that is fully
compliant with the PCIe power management specification
and supports software control of the SerDes outputs to
allow optimization of power and signal strength in a
system. Furthermore, the SerDes block supports loop-back
modes and advanced reporting of error conditions,
which enables efficient management of the entire system.
Interoperability
The PEX 8748 is designed to be fully compliant with the
PCI Express Base Specification r2.0, and is backwards
compatible to PCI Express Base Specification r1.1 and
© PLX Technology, www.plxtech.com
Page 2 of 5
10/20/2010, Version 1.0
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