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IRS2509SPBF データシートの表示(PDF) - International Rectifier

部品番号
コンポーネント説明
一致するリスト
IRS2509SPBF
IR
International Rectifier IR
IRS2509SPBF Datasheet PDF : 21 Pages
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IRS2509SPbF
Shut down Input
The IRS2509 is equipped with a shut down (/SD) input pin that is used to shutdown or enable the HVIC. When the /SD pin is in the
high state the HVIC is able to operate normally. When the /SD pin is in low state the HVIC is tristated.
Figure 5: Shut down
50%
IN
HO
LO
DTLO-HO 10%
90%
50%
90%
DTHO-LO
MDT = DTLO-HO
10%
- DTHO-LO
Figure 6: Dead time Definition
Figure 7: Delay Matching waveform Definition
Input Logic Compatibility
The inputs of this IC are compatible with standard CMOS and TTL outputs. The IRS2509 has been designed to be compatible with
3.3 V and 5 V logic-level signals. The IRS2509 features an integrated 5.2 V Zener clamp on the /SD. Figure 8 illustrates an input
signal to the IRS2509, its input threshold values, and the logic state of the IC as a result of the input signal.
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