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AN-9719 データシートの表示(PDF) - Fairchild Semiconductor

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AN-9719 Datasheet PDF : 12 Pages
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AN-9719
4. Printed Circuit Board Layout
High-frequency switching current / voltage makes printed
circuit board layout a very important design task. Good PCB
layout minimizes excessive EMI and helps the power supply
survive during surge/ESD tests.
4.1 Guidelines
To get better EMI performance and reduce line-frequency
ripple, the output of the bridge rectifier should be connected
to capacitor CDC first, then to the switching circuits.
ƒ The high-frequency current loop is in CDC – Transformer
– Drain pin – CDC. The area enclosed by this current loop
should be as small as possible. Keep the traces (especially
21 in Figure 17) short, direct, and wide. High-voltage
traces related the drain and RCD snubber should be kept
far away from control circuits to prevent unnecessary
interference.
ƒ As indicated by 2, the ground of control circuits should
be connected first, then route other traces.
ƒ As indicated by 3, the area enclosed by the transformer
auxiliary winding, DDD and CDD should also be kept
small. Place CDD close to the controller for good
decoupling.
APPLICATION NOTE
ƒ GND231 are suggestions for ESD tests where the
earth ground is not available on the power supply. In the
ESD discharge path, the charge goes from the secondary,
through the transformer stray capacitance, to GND3,
then GND1, and back to mains. It should be noted that
control circuits should not be placed on the discharge
path. Point discharge for common-mode choke (see
Figure 17) can decrease high-frequency impedance and
increase ESD immunity.
ƒ Should a Y-cap between primary and secondary be
required, connect this Y-cap to the positive terminal of
CDC. If this Y-cap is connected to primary ground, it
should be connected to the negative terminal of CDC
(GND1) directly. Point discharge of this Y-cap also
helps for ESD. In addition, the creepage distance
between these two pointed ends should be at least 5mm
according to safety requirements.
Figure 17. Layout Considerations
© 2010 Fairchild Semiconductor Corporation
Rev. 1.0.0 • 11/2/10
10
www.fairchildsemi.com

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