MX802 データシートの表示（PDF） - CML Microsystems Plc
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コンポーネント説明
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MX802 Datasheet PDF : 24 Pages
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DVSR CODEC
13
Setting
Byte 1
MSB
Bit 7
Bit 6
1
0
Bit 5
1
0
Bit 4
1
0
Bit 3
1
0
Bit 2
1
0
Bit 1
1
0
Bit 0
1
0
Setting
Byte 0
MSB
Bit 7 Bit 6
0
0
0
1
1
0
1
1
Bit 5 Bit 4 Bit 3
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Bit 2 Bit 1 Bit 0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Function
First Byte for Transmission
Not used – Set to ‘0’
Direct Access
Encoder Data out to A0/ENO
Encoder Clock to A3/ECK
Decoder Input from A1/DEI
Decoder Clock from A2/DCK
Normal DVSR Operation
Play Counter
Decrement
Increment
DRAM Control
Disable DRAM
Enable DRAM
Codec Powersave
Powersave MX802
MX802 Enable
Store Command Interrupt
Enable Interrupt
Disable
Play Command Interrupt
Enable Interrupt
Disable
Power Reading Interrupt
Enable Interrupt
Disable
Function
Last Byte for Transmission
Store/Play Speech Sync.
No Sync
No Sync
Sync – Play after Store
Sync – Store after Play
Decoder Control
Idle (32kbps); Aud O/P from LPF
Idle (32kbps); Aud bypass
Idle (32kbps); Aud O/P at high Z
On-Sampling Rate 16kbps
On-Sampling Rate 25kbps
On-Sampling Rate 32kbps
On-Sampling Rate 50kbps
On-Sampling Rate 64kbps
Encoder Control
I/P at VBIAS; F/Idle (32kbps)
I/P at high Z; F/Idle (32kbps)
I/P at high Z; F/Idle (64kbps)
On-Sampling Rate 16kbps
On-Sampling Rate 25kbps
On-Sampling Rate 32kbps
On-Sampling Rate 50kbps
On-Sampling Rate 64kbps
Table 6: Control Register
MX802
1998 MX-COM, Inc.
www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054
Doc. # 20480033.008
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
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