CP80C88Z データシートの表示（PDF） - Intersil
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CP80C88Z Datasheet PDF : 38 Pages
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80C88
VCC
82C84A/85
MN/MX
CLK IO/M
VCC
RES
READY RD
RDY
RESET WR
CLOCK
GND GENERATOR
INTA
80C88
CPU
DT/R
DEN
1
ALE
GND
GND
STB
OE
VCC
C1
AD0-AD7
20
A8-A19
GND
ADDR/DATA
82C82
LATCH
(1, 2 OR 3)
C2
40
VCC
C1 = C2 = 0.1μF INTR
T
OE
82C86
TRANSCEIVER
ADDRESS
DATA
EN
82C59A
INTERRUPT
CONTROL
INT
OE CS RDWR
HM-65162
HS-6616
82CXX
CMOS PROM CMOS PROM PERIPHERALS
IR0-7
FIGURE 3. DEMULTIPLEXED BUS CONFIGURATION
VCC
82C84A/85
RES
RDY
GND
MN/MX
CLK
S0
READY S1
RESET S2
80C88
CPU
GND
CLK MRDC
S0
MWTC
S1 82C88 AMWC
NC
S2
IORC
DEN
IOWC
DT/R
AIOWC
NC
ALE
INTA
1
GND
GND
STB
OE
VCC
C1
AD0-AD7
20
A8-A19
GND
ADDR/DATA
82C82
LATCH
(1, 2 OR 3)
C2
40
VCC
C1 = C2 = 0.1μF INT
T
OE
82C86
TRANSCEIVER
ADDRESS
DATA
82C59A
INTERRUPT
CONTROL
OE CS RDWR
HM-65162
HS-6616
82CXX
CMOS PROM CMOS PROM PERIPHERALS
IR0-7
FIGURE 4. FULLY BUFFERED SYSTEM USING BUS CONTROLLER
10
FN2949.4
February 22, 2008
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