HPMX-5002-STR データシートの表示（PDF） - HP => Agilent Technologies
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HPMX-5002-STR Datasheet PDF : 14 Pages
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HPMX-5002 Summary Characterization Information
Typical values measured on test board shown in Figure 1 at Vccx = 3.0 V, TA = 25°C,
fin = 110.592 MHz, fLO2 = 103.68 MHz, unless otherwise noted.
Symbol Parameters and Test Conditions
Units Typ.
VIH
CMOS input high voltage (can be pulled up as high as Vcc+7V)
V ≥ Vcc-0.8
VIL
CMOS input low voltage
V
≤ 1.0
IIH
CMOS input high current
µA
< 50
IIL
CMOS input low current
Mode switching time
µA >-50
µS
<1
P1 dB Mixer input 1 dB compression point
matched to 50 Ω source dBm -23
IIP3
Mixer input IP3
matched to 50 Ω source dBm -17
NFIF1
Mixer SSB noise figure
(see test diagram Fig. 1)
input matched to 50 Ω dB
12
source, 600 Ω load at output
ZinIP1 Mixer input impedance
50 MHz < fin < 250 MHz Ω
100
RSSI dynamic range
Note 1 dB
75
(for signal input at IFIP1; RSSI output measured with 6 bit ADC)
RSSI voltage change
Note 1 mV/dB 17
RSSI output voltage. Vccx = 3 V,
VRSSI is monotonic
2 IF limiter input level:
- 90 dBm V
0.88
-50 dBm
1.48
-20 dBm
2.04
ZoutRSSI RSSI output impedance
kΩ
30
IF2f3 dB IF2 limiter bandwidth
MHz 45
AVIF2 IF2 limiter voltage gain
Prior to limiting, Note 2 dB
57
ZinIFIP1 IF2 limiter input impedance at pin IFIP1
Note 2 Ω
600
VoutLO2 LO2 output buffer differential amplitude > 1.5 kΩ differential load, mVp-p 335
(between OSCOP and OSCOPB)
fvco=103.68 MHz, VCC= 3 V
Bit slicer time constant ratio
TCSET =0 vs. TCSET = 1
80:1
LO2 VCO output buffer noise floor
(@ 4 MHz offset)
tank circuit Q = 35 dBc/Hz -142
PLL charge pump leakage current
pA <100
ILKDET Lock detector current sink
Logic ‘0’ (unlocked) mA
1.1
Notes:
1: RSSI signal is monotonic over stated dynamic range, but not necessarily linear. Voltage change is
defined in the linear region of the transfer curve.
2: IF2 frequency in the range 1 MHz < f < 45 MHz, with 10 nF capacitors from DC1A and DC1B to
ground.
7-108
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