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ISL8200MM データシートの表示(PDF) - Intersil

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ISL8200MM Datasheet PDF : 24 Pages
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Electrical Specifications (Continued)
ISL8200MM
PARAMETER
SYMBOL
TEST CONDITIONS
OVERVOLTAGE PROTECTION (Note 6)
OV Latching Up Trip Point
EN = UGATE = LATCH Low, LGATE = High
OV Non-Latching Up Trip Point
EN = Low, UGATE = Low, LGATE = High
LGATE Release Trip Point
EN = Low/HIGH, UGATE = Low, LGATE = Low
OVER-TEMPERATURE PROTECTION (Note 6)
Over-Temperature Trip
Over-Temperature Release Threshold
INTERNAL COMPONENT VALUES
Internal Resistor Between PVCC and
RCC
VCC pin
Internal Resistor Between PHASE and
OCSET Pins
RSEN1
Internal Resistor Between FSYNC_IN
RFS
and SGND Pins
Internal Resistor Between PGOOD and
RPG
VCC Pins
Internal Resistor Between CLKOUT and
VCC Pins
RCLK
Internal Resistor Between PH_CNTRL
and VCC Pins
RPHC
Internal Resistor Between VOUT_SET
and VSEN_REM- pin
ROS1
5. Parameters with TYP limits are not production tested, unless otherwise specified.
6. Parameters are 100% tested for internal IC prior to module assembly.
7. Limits should be considered typical and are not production tested.
8. Refer to Defense Logistics Agency (DLA) drawing number V62/10608 for min/max parameters.
TYP
MIN
(Note 5)
MAX UNITS
(Note 8)
120
113
87
(Note 8) %
%
%
150
°C
125
°C
5
2.2k
59k
10k
10k
10k
2.2k
VIN
CIN (BULK)
GND
R1
16. 5k
CIN(CER)
10uF 25V
x2
R2
4.12k
CEN
1nF
ISFETDRV1
PVIN
VOUT
VIN
FF ISILS8L28002M00MMREP
EN
VOUT_S ET
FSY NC_IN
V SEN_REM-
CLKOUT
ISHARE_B US
PGOOD1
PGOOD
ISFETDRV
PH_CNTRL
V CC
2.2k
RSET
1.2V 10A
V OUT
COUT
47uF 10V
x8
RISHARE
5k
CPVCC
10uF
FIGURE 5. TEST CIRCUIT FOR ALL PERFORMANCE AND DERATING GRAPHS
9
FN7690.2
March 15, 2013

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