BLOCK DIAGRAM
CLK
A
R/L
STB
BLK
µPD16326A
32-bit bidirectional shift registers
B
32-bit latch
O1
O2
O32
PIN CONFIGURATION (Top View)
VDD2
1
VSS2
2
A
3
BLK
4
STB
5
CLK
6
VSS1
7
R/L
8
VDD1
9
B
10
VSS2
11
33
O12
32
O13
31
O14
30
O15
29
O16
28
O17
27
O18
26
O19
25
O20
24
O21
23
O22
Remark Be sure to enter the power to VDD1, logic signal, and VDD2, in that order, and turn off the power in the reverse
order.
2