RF3000 データシートの表示（PDF） - RF Micro Devices

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RF3000

SPREAD-SPECTRUM BASEBAND MODEM

RF Micro Devices 

RF3000

Parameter

Specification

Unit

Min.

Typ.

Max.

Condition

I/Q ADC

Full Scale Input Voltage

Input Bandwidth

Input Capacitance

Input Impedance

I/Q DAC

0.7

+10%

VP-P

See Note 7.

11

MHz

5

pF

50

kΩ

Full Scale Output Voltage

Sample Rate

Resolution

DNL

INL

TX VGC DAC

200

mV

See Note 7.

11

MHz

6

bits

0.5

LSB

0.5

1.0

LSB

Tested for monotonicity.

Maximum Gain Output Voltage

Minimum Gain Output Voltage

Resolution

DNL

INL

RX VGC DAC

Maximum Gain Output Voltage

Minimum Gain Output Voltage

Resolution

DNL

INL

Control Port Timing

1.2

V

2.0

V

6

bits

0.5

LSB

0.5

1.0

LSB

Tested for monotonicity.

1.2

V

2.0

V

6

bits

0.5

LSB

0.5

1.0

LSB

Tested for monotonicity.

Characteristics

SPI Mode

Mode Switching Characteristics.

See Figure 3.

C CLK Clock Frequency

6

MHz

fCLK

CS High Time Between

1.1

Transmissions

µS

tCSH

CS Falling to C CLK Edge

22

nS

tCSS

C CLK Low Time

68

nS

tCLKL

C CLK High Time

68

nS

tCLKH

CD IN to C CLK Setup Time

42

nS

tDSU

C CLK Rising to Data Hold Time

16

nS

tDHLD

C CLK Falling to CD OUT Stable

Notes:

47

nS

tPD

1. AC tests performed with CL=20pF, IOL=2mA, and IOH=-1mA. Input reference level all inputs VCC/2. Test VIH=VCC,

VIL=0V; VOH=VOL=VCC/2.

2. Not tested, but characterized at initial design and at major process/design changes.

3. Measured from VIL to VIH.

4. TX PE must be inactive before going active to generate a new packet.

5. IOUT/QOUT are modulated after last chip of valid data to provide ramp-down time for RF/IF circuits.

6. A new search will begin after last bit of 802.11 packet in 802.11 modes.

7. Centered about 1.7V VREF.

8. Accurate to within ±3dB of final gain setting.

Rev A4 031216

11-323

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