PN511 データシートの表示（PDF） - NXP Semiconductors.
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PN511 Datasheet PDF : 22 Pages
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NXP Semiconductors
PN511
Transmission Module
Table 4. Pin description HVQFN40
Symbol
Pin
Type Description
A2 to A5 1 to 4
I
Address Line
PVDD
5
PWR Pad power supply
DVDD
6
PWR Digital Power Supply
DVSS
7
PWR Digital Ground
PVSS
8
PWR Pad power supply ground
NRSTPD 9
I
Not Reset and Power Down: When LOW, internal current sinks are switched off, the
oscillator is inhibited, and the input pads are disconnected from the outside world. With
a positive edge on this pin the internal reset phase starts.
SIGIN
10
I
Communication Interface Input: accepts a digital, serial data stream
SIGOUT 11
O
Communication Interface Output: delivers a serial data stream
LOADMOD 12
O
Load Modulation Output: provides digital signal for FeliCa and Mifare Card Operation
mode
TVSS
13
PWR Transmitter Ground: supplies the output stage of TX1 and TX2
TX1
14
O
Transmitter 1: delivers the modulated 13.56 MHz energy carrier
TVDD
15
PWR Transmitter Power Supply: supplies the output stage of TX1 and TX2
TX2
16
O
Transmitter 2: delivers the modulated 13.56 MHz energy carrier
TVSS
17
PWR Transmitter Ground: supplies the output stage of TX1 and TX2
AVDD
18
PWR Analog Power Supply
VMID
19
PWR Internal Reference Voltage: This pin delivers the internal reference voltage.
RX
20
I
Receiver Input
AVSS
21
PWR Analog Ground
AUX1
22
O
Auxiliary Outputs: These pins are used for testing.
AUX2
23
O
OSCIN
24
OSCOUT 25
I
Crystal Oscillator Input: input to the inverting amplifier of the oscillator. This pin is
also the input for an externally generated clock (fosc = 27.12 MHz).
O
Crystal Oscillator Output: Output of the inverting amplifier of the oscillator.
IRQ
26
O
Interrupt Request: output to signal an interrupt event
NWR
27
I
Not Write: strobe to write data (applied on D0 to D7) into the PN511 register
NRD
28
I
Not Read: strobe to read data from the PN511 register (applied on D0 to D7)
ALE
29
I
Address Latch Enable: signal to latch AD0 to AD5 into the internal address latch
when HIGH.
NCS
30
I
Not Chip Select: selects and activates the host controller interface of the PN511
D0 to D7 31 to 38 I/O
8-bit Bi-directional Data Bus.
Remark: For serial interfaces this pins can be used for test signals or I/Os.
Remark: If the host controller selects I2C as digital host controller interface, these pins
can be used to define the I2C address.
A0 to1 A1 39 to 40 I
Address Line
082733
Product short data sheet
Rev. 3.3 — 13 June 2007
© NXP B.V. 2007. All rights reserved.
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