MX10F201FC データシートの表示（PDF） - Macronix International

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MX10F201FC

High-Performance and Low Power Microcontroller designed for Use Many Applications

Macronix International 

MX10F201FC

Table. 2 Internal data memory access

LOCATION

RAM 0 to 127

RAM 128 to 255

AUX-RAM 0 to 255

Special Function Register (SFR) 128 to 255

ADDRESSED

DIRECT and INDIRECT

INDIRECT only

INDIRECT only with MOVX

DIRECT only

Fig. 4 shows the internal memory address space. Table 3 shows the Special Function Register (SFR) memory

map. Location 0 to 31 at the lower RAM area can be devided into four 8-bit register banks. Only one of these

banks may be enabled at a time. The next 16 bytes, locations 32 through 47, contain 128 directly addressable bit

locations.

The stack can be located anywhere in the internal 256 byte RAM. The stack depth is only limited by the available

internal RAM space of 256 bytes. All registers except the Program Counter and the four 8-byte register banks

reside in the SFR address space.

- Register

- Direct

- Register-Indirect

- Immediate

- Base-Register plus Index-Register-Indirect.

The first three methods can be used for addressing destination operands. Most instructions have a 'destination /

source' field that specifies the data type, addressing methods and operands involved. For operations other than

MOVs, the destination operand is also a source operand.

Access to memory addresses is as follows:

- Register in one of the four 8-byte register banks through Direct or Register-Indirect addressing.

- 256 bytes of internal RAM through Direct or Register-Indirect addressing. Bytes 0-127 of internal RAM may be

only be addressed indirectly as data RAM.

- SFR through direct addressing at address location 128-255.

P/N:PM0730

OVERLAPPED SPACE with different access schemes

INTERNAL DATA MEMORY

16 K

255

internal

INDIRECT ONLY

program

memory 127 ---------------------

0

DIRECT AND

0

INDIRECT

SFRs

Direct only

AUXILIARY

RAM

through

MOVX access

MAIN RAM

SFRs

AUX-RAM

PROGRAM MEMORY

Fig. 4 Internal program and data memory address space

6

REV. 0.1, FEB. 14, 2003

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