MT5C2565 データシートの表示（PDF） - Austin Semiconductor

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MT5C2565

64K x 4 SRAM SRAM MEMORY ARRAY

Austin Semiconductor 

Austin Semiconductor, Inc.

SRAM

MT5C2565

WRITE CYCLE NO. 1 12

(Chip Enabled Controlled)

ADDRESS

ttAASS

CE\

WE\ 112233445566778899001122334455667788990011

D

Q

ttWWCC

ttAAWW

ttCCWW

ttAAHH

ttWWPP1

ttDDSS

11122233445566778899001122334455667788990011223344556677889900112211223344556677889900

ttDDH

DATA VAILD

HIGH Z

WRITE CYCLE NO. 2 7, 12

(Write Enabled Controlled)

ADDRESS

ttWWCC

ttAAWW

CE\ 1112223334445556667778889990001112223334445556667711172221

ttAASS

WE\

111222333444555666777888999

D

Q

1111222233334444555566667777888899990000111122223333444411115555111166222266111133334444tHZWE

ttCCWW

ttWWPP1

tDS

DATA VALID

HIGH-Z

ttAAHH

12111222333444555666777888999000111222333444555666777888999000111222333

ttDDHH

tLZWE1111222211113333222211114444222233334444555566661111

NOTE: Output enable (OE\) is inactive (HIGH).

MT5C2565

Rev. 1.5 1/01

7

111222333 DON’T CARE

1111222233334444UNDEFINED

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

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