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MC10H209FN データシートの表示(PDF) - ON Semiconductor

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MC10H209FN
ON-Semiconductor
ON Semiconductor ON-Semiconductor
MC10H209FN Datasheet PDF : 6 Pages
1 2 3 4 5 6
MC10H209
Dual 4−5−Input OR/NOR
Gate
Description
The MC10H209 is a Dual 45input OR/NOR gate. This MECL
part is a functional/pinout duplication of the MECL III part MC1688.
Features
Propagation Delay Average, 0.75 ns Typical
Power Dissipation 125 mW Typical
Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
Voltage Compensated
MECL 10KCompatible
PbFree Packages are Available*
LOGIC DIAGRAM
4
5
3
6
2
7
9
10
14
11
12
15
13
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
DIP
PIN ASSIGNMENT
VCC1
1
AOUT
2
AOUT
3
AIN
4
AIN
5
AIN
6
AIN
7
VEE
8
16
VCC2
15
BOUT
14
BOUT
13
BIN
12
BIN
11
BIN
10
BIN
9
BIN
Pin assignment is for DualinLine Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18
of the ON Semiconductor MECL Data Book (DL122/D).
*For additional information on our PbFree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
1
February, 2006 Rev. 7
http://onsemi.com
MARKING DIAGRAMS*
CDIP16
L SUFFIX
CASE 620A
16
MC10H209L
AWLYYWW
1
16
16
1
PDIP16
P SUFFIX
CASE 648
MC10H209P
AWLYYWW
1
10H209
ALYWG
SOEIAJ16
CASE 966
1 20
20 1
PLLC20
FN SUFFIX
CASE 775
10H209G
AWLYYWW
A
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G
= PbFree Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
Publication Order Number:
MC10H209/D

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