MC10101 データシートの表示（PDF） - ON Semiconductor
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MC10101 Datasheet PDF : 8 Pages
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MC10101
Quad OR/NOR Gate
The MC10101 is a quad 2–input OR/NOR gate with one input from
each gate common to pin 12.
• PD = 25 mW typ/gate (No Load)
• tpd = 2.0 ns typ
• tr, tf = 2.0 ns typ (20%–80%)
LOGIC DIAGRAM
4
2
5
7
3
6
10
14
11
13
15
12
9
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
DIP
PIN ASSIGNMENT
VCC1
1
AOUT
2
BOUT
3
AIN
4
AOUT
5
BOUT
6
BIN
7
VEE
8
16
VCC2
15
DOUT
14
COUT
13
DIN
12
COMMON
INPUT
11
COUT
10
CIN
9
DOUT
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18
of the ON Semiconductor MECL Data Book (DL122/D).
http://onsemi.com
CDIP–16
L SUFFIX
CASE 620
PDIP–16
P SUFFIX
CASE 648
PLCC–20
FN SUFFIX
CASE 775
MARKING
DIAGRAMS
16
MC10101L
AWLYYWW
1
16
MC10101P
AWLYYWW
1
1
10101
AWLYYWW
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
ORDERING INFORMATION
Device
Package
Shipping
MC10101L
CDIP–16
25 Units / Rail
MC10101P
PDIP–16
25 Units / Rail
MC10101FN
PLCC–20
46 Units / Rail
© Semiconductor Components Industries, LLC, 2002
1
January, 2002 – Rev. 7
Publication Order Number:
MC10101/D
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