CS61884 データシートの表示（PDF） - Cirrus Logic

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CS61884

Octal T1/E1/J1 Line Interface Unit

Cirrus Logic 

CS61884

LIST OF TABLES

Table 1. Operation Mode Selection ................................................................................................. 10

Table 2. Mux/Bits Clock Selection .................................................................................................. 11

Table 3. Cable Impedance Selection ................................................................................................ 15

Table 4. G.772 Address Selection .................................................................................................... 22

Table 5. Hardware Mode Line Length Configuration Selection ...................................................... 25

Table 6. Jitter Attenuator Configurations ......................................................................................... 28

Table 7. Operational Summary ........................................................................................................ 29

Table 8. Host Control Signal Descriptions ...................................................................................... 32

Table 9. Host Mode Register Set ..................................................................................................... 34

Table 10. JTAG Instructions ............................................................................................................ 47

Table 11. Boundary Scan Register ................................................................................................... 48

Table 12. Transformer Specifications .............................................................................................. 53

Revision

PP4

F1

Date

May ‘04

Aug ‘05

Changes

Preliminary release.

Added lead-free, 144-pin LQFP package option.

6

DS485F1

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