IDT54FCT273P データシートの表示（PDF） - Integrated Device Technology

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IDT54FCT273P

Fast smos octal flip-flop with master reset

Integrated Device Technology 

IDT54/74FCT273/A/C FAST CMOS

OCTAL D FLIP-FLOP WITH MASTER RESET

MILITARY AND COMMERCIAL TEMPERATURE RANGES

SWITCHING CHARACTERISTICS OVER OPERATING RANGE

IDT54/74FCT273

IDT54/74FCT273A

IDT54/74FCT273C

Symbol

tPLH

tPHL

Parameter

Propagation Delay

Clock to Output

Condition(1)

CL = 50 pF

RL = 500Ω

Com’l.

Mil.

Com’l.

Mil.

Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max.

2.0 13.0 2.0 15.0 2.0 7.2 2.0 8.3

Com’l.

Mil.

Min.(2) Max. Min.(2) Max.

2.0 5.8 2.0 6.5

Unit

ns

tPHL

MRPropagation Delay

to Output

2.0 13.0 2.0 15.0 2.0 7.2 2.0 8.3 2.0 6.1 2.0 6.8 ns

tSU

Set-up Time HIGH

or LOW Data to CP

3.0 — 3.5 — 2.0 — 2.0 — 2.0 — 2.0 — ns

tH

Hold Time HIGH

or LOW Data to CP

2.0 — 2.0 — 1.5 — 1.5 — 1.5 — 1.5 — ns

tW

Clock Pulse Width

HIGH or LOW

tW

MR Pulse Width

LOW

7.0 — 7.0 — 6.0 — 6.0 — 6.0 — 6.0 — ns

7.0 — 7.0 — 6.0 — 6.0 — 6.0 — 6.0 — ns

tREM

MRRecovery Time

to CP

4.0 — 5.0 — 2.0 — 2.5 — 2.0 — 2.5 — ns

NOTES:

1. See test circuit and waveforms.

2. Minimum limits are guaranteed but not tested on Propagation Delays.

2558 tbl 07

7.10

5

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