IDT54FCT2374ATEB データシートの表示（PDF） - Integrated Device Technology

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IDT54FCT2374ATEB

FAST CMOS OCTAL D REGISTERS (3-STATE)

Integrated Device Technology 

IDT54/74FCT374T/AT/CT/DT - 2374T/AT/CT, IDT54/74FCT534T/AT/CT, IDT54/74FCT574T/AT/CT/DT - 2574T/AT/CT

FAST CMOS OCTAL D REGISTERS (3-STATE)

MILITARY AND COMMERCIAL TEMPERATURE RANGES

TEST CIRCUITS AND WAVEFORMS

TEST CIRCUITS FOR ALL OUTPUTS

V CC

7.0V

VIN

Pulse

Generator

D.U.T.

RT

VOUT

50pF

CL

500Ω

500Ω

2569 drw 06

SWITCH POSITION

Test

Switch

Open Drain

Disable Low

Closed

Enable Low

All Other Tests

Open

DEFINITIONS:

CL= Load capacitance: includes jig and probe capacitance.

RT = Termination resistance: should be equal to ZOUT of the Pulse

Generator.

SET-UP, HOLD AND RELEASE TIMES

PULSE WIDTH

DATA

INPUT

TIMING

tSU

tH

3V

1.5V

0V

3V

LOW-HIGH-LOW

PULSE

1.5V

INPUT

1.5V

ASYNCHRONOUS CONTROL

PRESET

tREM

0V

3V

tW

CLEAR

ETC.

1.5V

0V

HIGH-LOW-HIGH

PULSE

1.5V

SYNCHRONOUS CONTROL

PRESET

CLEAR

CLOCK ENABLE

tSU

tH

3V

1.5V

0V

2569 drw 08

ETC.

2569 drw 07

PROPAGATION DELAY

SAME PHASE

INPUT TRANSITION

tPLH

tPHL

OUTPUT

tPLH

tPHL

OPPOSITE PHASE

INPUT TRANSITION

ENABLE AND DISABLE TIMES

3V

1.5V

0V

VOH

1.5V

VOL

3V

1.5V

0V

2569 drw 09

ENABLE

DISABLE

3V

CONTROL

INPUT

tPZL

1.5V

0V

tPLZ

OUTPUT

NORMALLY

LOW

SWITCH

CLOSED

tPZH

3.5V

1.5V

tPHZ

3.5V

0.3V VOL

OUTPUT

NORMALLY

HIGH

SWITCH

OPEN

1.5V

0V

0.3V VOH

0V

2569 drw 10

NOTES:

1. Diagram shown for input Control Enable-LOW and input Control Disable-

HIGH

2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns

6.13

7

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