ADIS16100ACC データシートの表示（PDF） - Analog Devices

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ADIS16100ACC

±300°/sec Yaw Rate Gyroscope with SPI

Analog Devices 

THEORY OF OPERATION

The ADIS16100 operates on the principle of a resonator

gyroscope. Two polysilicon sensing structures each contain a

dither frame that is electrostatically driven to resonance. This

produces the necessary velocity element to produce a Coriolis

force while rotating. At two of the outer extremes of each frame,

orthogonal to the dither motion, are movable fingers that are

placed between fixed pickoff fingers to form a capacitive pickoff

structure that senses Coriolis motion. The resulting signal is fed

to a series of gain and demodulation stages that produce the

electrical rate signal output. The rate signal is then converted to

a digital representation of the output on the SPI pins. The dual-

sensor design rejects external g forces and vibration. Fabricating

the sensor with the signal conditioning electronics preserves

signal integrity in noisy environments.

The electrostatic resonator requires 14 V to 16 V for operation.

Because only 5 V is typically available in most applications, a

charge pump is included on-chip. After the demodulation stage,

there is a single-pole, low-pass filter included on-chip that is

used to limit high frequency artifacts before final amplification.

The frequency response is dominated by the second low-pass

filter, which is set at 40 Hz. For additional bandwidth reduction

options, see the Setting Bandwidth section.

SUPPLY AND COMMON CONSIDERATIONS

Power supply noise and transient behaviors can influence the

accuracy and stability of any sensor-based measurement system.

When considering the power supply for the ADIS16100, it is

important to understand that the ADIS16100 provides 0.2 μF of

decoupling capacitance on the VCC pin. Depending on the level

of noise present in the system power supply, the ADIS16100

may not require any additional decoupling capacitance for this

supply. The analog supply, VCC, and the digital interface supply,

VDRIVE, are segmented to allow multiple logic levels to be used

in receiving the digital output data. VDRIVE is intended for the

downstream logic power supply and supports standard 3.3 V

and 5 V logic families. The VDRIVE supply does not have internal

decoupling capacitors.

INCREASING MEASUREMENT RANGE

The full-scale measurement range of the ADIS16100 is increased

by placing an external resistor between the RATE pin and FILT

pin, which results in a parallel connection with the internal

180 kΩ, 1% resistor. For example, a 330 kΩ external resistor

gives ~50% increase in the full-scale range. This is effective for

up to a 4× increase in the full-scale range (minimum value of

the parallel resistor allowed is 45 kΩ). The internal circuitry

headroom requirements prevent further increase in the linear

full-scale output range. The trade-offs associated with increasing

the full-scale range are potential increase in output null drift (as

much as 2°/sec over temperature) and introducing initial null

bias errors that must be calibrated.

ADIS16100

SETTING BANDWIDTH

An external capacitor can be used in combination with an

on-chip resistor to create a low-pass filter to limit the bandwidth

of the ADIS16100 rate response.

The −3 dB frequency is defined as

( ( )) fOUT = 1/ 2× π × ROUT × COUT + 0.022 μF

where:

ROUT is the internal impedance that was trimmed during

manufacturing to 180 kΩ ± 1%.

COUT is the external capacitance across the RATE and FILT pins.

Any external resistor applied between RATE and FILT results in

( ) ( ) ROUT = 180 kΩ × REXT / 180 kΩ + REXT

where REXT is the external resistor.

With COUT = 0 μF, a default −3 dB frequency response of 40 Hz

is obtained based upon an internal 0.022 μF capacitor implemented

on-chip.

SELF-TEST FUNCTION

The ADIS16100 includes a self-test feature that actuates each of

the sensing structures and associated electronics in the same

manner as if subjected to an angular rate. It provides a simple

method for exercising the mechanical structure of the sensor,

along with the entire signal processing circuit. It is activated by

standard logic high levels applied to Input ST1, Input ST2, or

both. ST1 causes a change in the digital output equivalent to

typically −221 LSB, and ST2 causes an opposite +221 LSB change.

The self-test response follows the viscosity temperature dependence

of the package atmosphere, approximately 0.25%/°C. Activating

both ST1 and ST2 simultaneously is not damaging. Because

ST1 and ST2 are not necessarily closely matched, actuating both

simultaneously can result in an apparent null bias shift.

Continuous Self-Test

As an additional failure detection measure, a power-on self-test can

be performed. However, some applications warrant a continuous

self-test while sensing rate.

RATE SENSITIVE AXIS

RATE

AXIS

LONGITUDINAL

AXIS

8

RATEOUT

+2047 LSB

CLOCK-WISE

ROTATION

1

45

LATERAL

AXIS

–2048 LSB

Figure 20. Rate Signal Increases with Clockwise Rotation

Rev. D | Page 11 of 16

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