ACT8600 データシートの表示（PDF） - Active-Semi, Inc
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ACT8600 Datasheet PDF : 49 Pages
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PIN DESCRIPTIONS CONT’D
ACT8600
Rev 3, 15-Nov-12
PIN
NAME
21
SW4 Switch Node for REG4.
DESCRIPTION
22
OUT4 REG4 Output.
23
NC No Connect.
24
OUT2 Output Voltage Sense for REG2.
25
VP2
Power Input for REG2. Bypass to GP12 with a high quality ceramic capacitor placed to the IC as
close as possible.
26
SW2 Switch Node for REG2.
27
GP12
Power Ground for REG1 and REG2. Connect GA, GP12 and GP3 together at a single point as
close to the IC as possible.
28
SW1 Switch Node for REG1.
29
VP1
Power Input for REG1. Bypass to GP12 with a high quality ceramic capacitor placed to the IC as
close as possible.
30
OUT1 Output Voltage Sense for REG1.
31 PWREN Master enable pin.
32
nIRQ Open-Drain Interrupt Output.
33
OUT10 REG10 Output. Bypass it to GA with a 0.47μF capacitor.
34
OUT9 REG9 Output. Bypass it to GA with a 1μF capacitor.
35
5VIN 5V Input pin for OTG switch (optionally from OUT4 or external 5V source).
36
VBUS USB VBUS.
Power Input for the Battery Charger. Bypass CHGIN to GA with a capacitor placed as close to
37
CHGIN the IC as possible. The battery charger is automatically enabled when a valid voltage is present
on CHGIN .
38, 39 VSYS System Output Pins. Bypass to GA with a 10μF or larger ceramic capacitor.
EP
EP Exposed Pad. Must be soldered to ground on PCB.
Innovative PowerTM
ActivePMUTM and ActivePathTM are trademarks of Active-Semi.
I2CTM is a trademark of NXP.
-7-
www.active-semi.com
Copyright © 2012 Active-Semi, Inc.
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