PM7350 データシートの表示（PDF） - PMC-Sierra

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PM7350

DUAL SERIAL LINK PHY MULTIPLEXER

PMC-Sierra 

RELEASED

DATA SHEET

PMC-1980581

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PM7350 S/UNI-DUPLEX

ISSUE 5

DUAL SERIAL LINK PHY MULTIPLEXER

OPERATION ........................................................................................ 182

12.1 MICROPROCESSOR INBAND COMMUNICATION ................. 182

12.2 INTERACTION BETWEEN BUS AND LVDS CONFIGURATIONS

.................................................................................................. 184

12.3 MAXIMUM CELL BIT RATE ...................................................... 193

12.4 MINIMUM PROGRAMMING ..................................................... 194

12.5 JTAG SUPPORT ....................................................................... 196

FUNCTIONAL TIMING......................................................................... 203

13.1 SCI-PHY/ANY-PHY INTERFACE .............................................. 203

13.2 CLOCKED SERIAL DATA INTERFACE .................................... 208

ABSOLUTE MAXIMUM RATINGS ....................................................... 210

D.C. CHARACTERISTICS ....................................................................211

MICROPROCESSOR INTERFACE TIMING CHARACTERISTICS..... 215

A.C. TIMING CHARACTERISTICS...................................................... 219

ORDERING AND THERMAL INFORMATION...................................... 226

MECHANICAL INFORMATION............................................................ 227

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

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