NCP1217P65 データシートの表示（PDF） - ON Semiconductor
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NCP1217P65
ON Semiconductor
NCP1217P65 Datasheet PDF : 18 Pages
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NCP1217, NCP1217A
Adj
1
FB
2
Current
Sense
3
Ground
4
Latchoff
+ Comparator
−
+
− 3.1 V
Set
Reset
Latch
UVLO
HV
8
HV Current
Source
80 k
1.1 V
Skip Cycle
+ Comparator
NC
−
UVLO High and Low
7
Internal VCC
24 k
Reset
Q Flip−Flop
VCC
250 ns
L.E.B.
65−100−133 kHz Set DCmax = 74% Q
Clock
Overload
Management
6
Reset
19 k
Ramp
Compensation
20 k
57 k
VREF
+
−
25 k
+
−
1V
1ms SS*
Drv
±500 mA
5
* Available for “A” version only
Figure 2. Internal Circuit Architecture
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Power Supply Voltage on All Other Pins Except Pin 8 (HV), Pin 6 (VCC) and Pin 5 (Drv)
−
−0.3 to 10
V
Maximum Voltage on Pin 8 (HV), Pin 6 (VCC) Decoupled to Ground with 10 mF
VHV
500
V
Maximum Voltage on Pin 8 (HV), Pin 6 (VCC) Grounded
VHV
450
V
Maximum Current into All Pins Except VCC (6) and HV (8) when 10 V ESD Diodes are Activated
−
5.0
mA
Thermal Resistance, Junction−to−Case
RqJC
57
°C/W
Thermal Resistance, Junction−to−Air, PDIP−7 Version
Thermal Resistance, Junction−to−Air, SO−8 Version
RqJA
RqJA
100
°C/W
178
Maximum Junction Temperature
TJMAX
150
°C
Temperature Shutdown
−
155
°C
Hysteresis in Shutdown
−
30
°C
Storage Temperature Range
−
−60 to +150
°C
ESD Capability, HBM Model (All Pins Except VCC and HV)
ESD Capability, Machine Model
−
2.0
kV
−
200
V
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
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