74HC4024 データシートの表示（PDF） - NXP Semiconductors.
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74HC4024 Datasheet PDF : 19 Pages
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NXP Semiconductors
74HC4024
7-stage binary ripple counter
6. Pinning information
6.1 Pinning
Fig 5. Pin configuration
74HC4024
CP 1
MR 2
Q6 3
Q5 4
Q4 5
Q3 6
GND 7
14 VCC
13 n.c.
12 Q0
11 Q1
10 n.c.
9 Q2
8 n.c.
001aab905
6.2 Pin description
Table 2. Pin description
Symbol
CP
MR
Q6, Q5, Q4, Q3, Q2, Q2, Q1, Q0
GND
n.c.
VCC
Pin
1
2
3, 4, 5, 6, 9, 11, 12
7
8, 10, 13
14
7. Functional description
Description
clock input (HIGH-to-LOW, edge-triggered)
master reset input (active HIGH)
parallel output
ground (0 V)
not connected
positive supply voltage
Table 3. Function table[1]
Input
MR
CP
H
X
L
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
= LOW-to-HIGH clock transition;
= HIGH-to-LOW clock transition.
Output
Qn
L
no change
count
74HC4024
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 23 August 2012
© NXP B.V. 2012. All rights reserved.
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