XRT83SH314
14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
REV. 1.0.4
CONTROL FUNCTION
NAME
PIN
TEST
D4
ICT
A2
TYPE
I
I
DESCRIPTION
Factory Test Mode
For normal operation, the TEST pin should be tied to ground.
NOTE: Internally pulled "Low" with a 50kΩ resistor.
In Circuit Testing
When this pin is tied "Low", all output pins are forced to "High" impedance for
in circuit testing.
NOTE: Internally pulled "High" with a 50KΩ resistor.
CLOCK SECTION
NAME
PIN
MCLKin
A6
8kHzOUT
D8
MCLKE1out
A5
MCLKE1Nout
A4
MCLKT1out
A7
MCLKT1Nout
B8
TYPE
I
O
O
O
O
O
DESCRIPTION
Master Clock Input
The master clock input can accept a wide range of inputs that can be used to
generate T1 or E1 clock rates on a per channel basis. See the register map for
details.
8kHz Output Clock
2.048MHz Output Clock
2.048MHz, 4.096MHz, 8.192MHz, or 16.384MHz Output Clock
See the register map for programming details.
1.544MHz Output Clock
1.544MHz, 3.088MHz, 6.176MHz, or 12.352MHz Output Clock
See the register map for programming details.
JTAG SECTION
NAME
PIN
ATP_TIP
D21
ATP_RING
K21
TMS
E4
TCK
B1
TYPE
I/O
I
I
DESCRIPTION
Analog Test Pin_TIP
Analog Test Pin_RING
These pins are used to check continuity of the Transmit and Receive TIP and
RING connections on the assembled board.
See SEE”ANALOG BOARD CONTINUITY CHECK” ON PAGE 40. for
more detailed description.
Test Mode Select
This pin is used as the input mode select for the boundary scan chain.
Test Clock Input
This pin is used as the input clock source for the boundary scan chain.
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