W83194BR-S データシートの表示（PDF） - Winbond
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W83194BR-S Datasheet PDF : 17 Pages
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Duty Cycle
Skew
Jitter
Dt
45
TSK
Tsc-c
W83194BR-S
PRELIMINARY
55
% VT=1.5V
175
ps VT=1.5V
500
ps VT=1.5V
7.5 Electronical Characteristics of SDRAM Clock
Vdd=3.3V +/- 5%; CL=20-30pF
Parameter
Symbol
Ouput Impedance
Ouput Impedance
RDSP
RDSN
Output Low Voltage
VOL
Output High Voltage
VOH
Output Low Current
IOL
Output High Current
IOH
Rise/Fall Time Min
Between 0.4 V and 2.0 V
TRF(min)
Rise/Fall Time Max
Between 0.4 V and 2.0 V
TRF(max)
Duty Cycle
Dt
Skew
TSK
Jitter
Tsc-c
Min
13.5
13.5
2.4
54
-54
0.4
45
Typ Max
40
40
0.45
54
-45
1.6
55
250
250
Units
Ohm
Ohm
V
V
MA
MA
ns
Test Conditions
IOL=1mA
IOH=-1mA
10pF Load
ns 20pF Load
% VT=1.5V
ps VT=1.5V
ps VT=1.5V
7.6 Electronical Characteristics of PCI Clock
Vdd=3.3V +/- 5%; CL=10-30pF
Parameter
Symbol Min Typ
Ouput Impedance
Ouput Impedance
Output Low Voltage
RDSP
15
RDSN
15
VOL
Output High Voltage
VOH
2.4
Output Low Current
IOL
30
Output High Current
IOH
-33
Rise/Fall Time Min
Between 0.4 V and 2.0 V
TRF(min)
0.5
Rise/Fall Time Max
Between 0.4 V and 2.0 V
TRF(max)
Max Units
Test Conditions
55 Ohm
55 Ohm
0.55
V
IOL=1mA
V
IOH=-1mA
38 MA
-33 MA
ns 10pF Load
2.0
ns 20pF Load
- 13 -
Publication Release Date: June 2000
Revisio
n 0.42
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