W149(2000) データシートの表示（PDF） - Cypress Semiconductor

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W149
(Rev.:2000)

440BX AGPset Spread Spectrum Frequency Synthesizer

Cypress Semiconductor 

W149

PCI Clock Outputs, PCI_F and PCI1:5 (Lump Capacitance Test Load = 30 pF)

Parameter

tP

tH

tL

tR

tF

tD

tJC

tSK

tO

fST

Zo

Description

Test Condition/Comments

Period

Measured on rising edge at 1.5V

High Time

Duration of clock cycle above 2.4V

Low Time

Duration of clock cycle below 0.4V

Output Rise Edge Rate Measured from 0.4V to 2.4V

Output Fall Edge Rate Measured from 2.4V to 0.4V

Duty Cycle

Measured on rising and falling edge at 1.5V

Jitter, Cycle-to-Cycle

Measured on rising edge at 1.5V. Maximum

difference of cycle time between two adja-

cent cycles.

Output Skew

Measured on rising edge at 1.5V

CPU to PCI Clock Skew Covers all CPU/PCI outputs. Measured on

rising edge at 1.5V. CPU leads PCI output.

Frequency Stabilization Assumes full supply voltage reached within

from Power-up (cold start) 1 ms from power-up. Short cycles exist pri-

or to frequency stabilization.

AC Output Impedance

Average value during switching transition.

Used for determining series termination

value.

CPU = 66.6/100 MHz

Min.

Typ.

Max.

30

12.0

12.0

1

4

1

4

45

55

250

500

1.5

4

3

30

Unit

ns

ns

ns

V/ns

V/ns

%

ps

ps

ns

ms

Ω

IOAPIC Clock Output (Lump Capacitance Test Load = 20 pF)

Parameter

f

tR

tF

tD

fST

Zo

Description

Test Condition/Comments

Frequency, Actual

Frequency generated by crystal oscillator

Output Rise Edge Rate Measured from 0.4V to 2.0V

Output Fall Edge Rate Measured from 2.0V to 0.4V

Duty Cycle

Measured on rising and falling edge at 1.25V

Frequency Stabilization Assumes full supply voltage reached within

from Power-up (cold start) 1 ms from power-up. Short cycles exist prior

to frequency stabilization.

AC Output Impedance

Average value during switching transition.

Used for determining series termination value.

CPU = 66.6/100 MHz

Min. Typ. Max.

14.31818

1

4

1

4

45

55

1.5

15

Unit

MHz

V/ns

V/ns

%

ms

Ω

REF0:1 Clock Output (Lump Capacitance Test Load = 20 pF)

CPU = 66.6/100 MHz

Parameter

Description

Test Condition/Comments

Min. Typ. Max.

f

Frequency, Actual

Frequency generated by crystal oscillator

14.318

tR

Output Rise Edge Rate Measured from 0.4V to 2.4V

0.5

2

tF

Output Fall Edge Rate Measured from 2.4V to 0.4V

0.5

2

tD

Duty Cycle

Measured on rising and falling edge at 1.5V.

45

55

fST

Frequency Stabilization Assumes full supply voltage reached within 1 ms from

3

from Power-up (cold power-up. Short cycles exist prior to frequency stabili-

star t)

zation.

Zo

AC Output Impedance Average value during switching transition. Used for de-

40

termining series termination value.

Unit

MHz

V/ns

V/ns

%

ms

Ω

12

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