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VT82C596B
DDRQ (Drive)
DDACK# (Host)
STOP (Host)
HDMARDY# (Host)
DSTROBE (Drive)
Data
TUI
TENV1
TLI1
TDS1
TDH1
Figure 8. UltraDMA-33 IDE Timing - Drive Initiating DMA Burst for Read Command
DDRQ (Drive)
TUI
DDACK# (Host)
STOP (Host)
DDMARDY# (Drive)
HSTROBE (Host)
DDMARDY# (Drive)
HSTROBE (Host)
Data
TENV2
TUI
TDVS2
TDVH2
Figure 9. UltraDMA-33 IDE Timing - Drive Initiating Burst for Write Command
Revision 0.3 June 17, 1999
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Electrical Specifications