VT82C596 データシートの表示（PDF） - Unspecified

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VT82C596

PCI INTEGRATED PERIPHERAL CONTROLLER

Unspecified 

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System Management Bus-Specific Configuration Registers

Offset 93-90 – SMBus I/O Base........................................RW

31-16 Fixed

.................................... always reads 00h

15-4 I/O Base .......................................... default = 00h

3-0 Fixed

................................ always reads 0001b

Offset D2 – SMBus Control..............................................RW

7-4 Reserved ........................................ always reads 0

3 SMBus Interrupt Select

0 SMI .....................................................default

1 SCI

2-1 Reserved ........................................ always reads 0

0 SMBus Controller Enable

0 Disable ...................................................default

1 Enable

VT82C596B

Offset D3 – SMBus Host Slave Command...................... RW

7-0 SMBus Host Slave Command Code..........default=0

Offset D4 – SMBus Slave Address for Port 1................. RW

7-1 SMBus Slave Address for Port 1...............default=0

0 R/W for Shadow Port 1

0 Disable................................................... default

1 Enable

Offset D5 – SMBus Slave Address for Port 2................. RW

7-1 SMBus Slave Address for Port 2...............default=0

0 R/W for Shadow Port 2

0 Disable................................................... default

1 Enable

Offset D6 – SMBus Revision ID ....................................... RO

7-0 SMBus Revision Code

Revision 0.3 June 17, 1999

-65-

Function 3 Registers - Power Management and SMBus

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