VSC7146 データシートの表示（PDF） - Vitesse Semiconductor
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VSC7146 Datasheet PDF : 19 Pages
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VITESSE
SEMICONDUCTOR CORPORATION
2.5Gb/s, 20-Bit Transceiver
Advance Product Information
VSC7146
Figure 6: TBC and REF Timing Waveforms
TBC
REF
REF
TBC
TH
TL
T1
T2
VIH(min)
VIL(max)
REF and TBC must not have their
opposing edges coincident within
2.0ns of each other.
Table 5: TBC and REF Requirements
Parameters
Description
Min
T1
Necessary lag time between TBC
and REF
—
T2
Necessary lead time between
TBC and REF
—
FR
Frequency Range
105
52.5
FO
TL,TH
Frequency Offset
Pulse Width, Low / High
−100
4.5
DC
TBC and REF duty cycle
40
TRCR,TRCF TBC and REF rise and fall time
0.6
Max
2.0
2.0
127
63.5
+100
2.5
60
1.5
Units
ns
ns
MHz
ppm
ns
%
ns
Conditions
Measured from falling edge of REF to rising
edge of TBC.
Measured from falling edge of REF to rising
edge of TBC.
Range over which both transmit and receive
reference clocks on any link may be centered.
The figure on top relects TXMODE=1 and the
bottom one reflects TXMODE=0.
|TXTBC - RXTBC|
Low is measured from VIL(max) to VIL(max),
High is measured from VIH(min) to VIH(min).
Min measurement refers to TXMODE=0 and
Max measurement refers to TXMODE=1.
Measured at 1.5V.
Between VIL(max) and VIH(min).
Page 8
© VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
G52162-0 Rev. 2.7
8/28/00
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