UPD72870FA2 データシートの表示（PDF） - NEC => Renesas Technology

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UPD72870FA2

IEEE1394 1-CHIP OHCI HOST CONTROLLER

NEC => Renesas Technology 

PHY Block Diagram

µPD72870,72871

PHY Control

Signal

(CMC,PC0-PC2)

PHY/Link

Interface

Link

Interface

I/O

Cable

Power

Status

Remark Cable Port:

Cable

Port1

Arbitration

and Control

State Machine

Logic

Cable

Port2

Cable

Port3

Receive Data

Decoder and

Retimer

Transmit Data

Encoder

Voltage

and

Current

Generator

Crystal

Oscillator

PLL

System

and

Transmit

Clock

Generator

Cable

Interface

PHY

Signal

Preliminary Data Sheet S13925EJ2V0DS00

3

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