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UPD4701AC データシートの表示(PDF) - NEC => Renesas Technology

部品番号
コンポーネント説明
メーカー
UPD4701AC
NEC
NEC => Renesas Technology NEC
UPD4701AC Datasheet PDF : 16 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
µPD4701A
AC CHARACTERISTICS (Ta = –40 to +85 °C, VDD = +5 V ± 10 %)
PARAMETER
SYMBOL
XA, XB
YA, YB
R, L
M
SF
RESET
W, Y
CF
CS
X/Y
U/L
D0 to 7
Input cycle
High-level pulse width
Low-level pulse width
Signal phase difference time
High-level pulse width
Low-level pulse width
Setting delay time
Reset delay time
Pulse width
Count enable time
Count clear time
Flag setting time
Flag reset time
Count setting time
CF enable time
CF disable time
Pulse width
Address setup time
Address hold time
Output delay time
Output delay time
Floating time
tCYAB
tPWABH
tPWABL
tSAB
tPWSWH
tPWSWL
tDSFL
tDSFH
tPWRS
tSCTEN
tDCTCL
tDABCF
tDCSCF
tSCT
tSCSCF
tHABCS
tPWCS
tSACS
tHCSAB
tDCSD
tDAD
tFCSD
RATING
MIN.
MAX.
2
900
900
350
30
30
50
50
100
0
100
120
100
0
140
140
200
0
0
150
100
50
UNIT
µs
ns
ns
ns
µs
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
TEST CONDITIONS
fin = 500 kHz
Switch OFF
Switch ON
Switch ON
Switch OFF
From RESETX, Y
From RESETX, Y
From XA, B, YA, B
From CS
From CF
From CF
From XA, B, YA, B
To CS
From CS
From CS
From X/Y, U/L
From CS
AC TEST INPUT WAVEFORM
2.6 V
0.45 V
1.5 V
Test Point
1.5 V
AC test : The input is driven by 2.6 V for logic “1”, and 0.45 V for logic “0”.
Timing measurement is performed at 1.5 V for both logic “1” and logic “0”.
10

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