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AD8343 データシートの表示(PDF) - Analog Devices

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AD8343 Datasheet PDF : 32 Pages
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AD8343
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
COMM 1
14 COMM
INPP 2 AD8343 13 OUTP
TOP VIEW
INPM 3 (Not to Scale) 12 OUTM
DCPL 4
11 COMM
VPOS 5
10 LOIP
PWDN 6
9 LOIM
COMM 7
8 COMM
Figure 2. Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
Mnemonic Description
1, 7, 8, 11, 14 COMM
Connect to low impedance circuit ground.
2
INPP
Differential Input Pin. This pin needs to be dc-biased and typically ac-coupled; see Figure 3.
3
INPM
Differential Input Pin. This pin needs to be dc-biased and typically ac-coupled; see Figure 3.
4
DCPL
Bias rail decoupling capacitor connection for LO driver; see Figure 6.
5
VPOS
Positive Supply Voltage (VS), 4.5 V to 5.5 V. Ensure adequate supply bypassing for proper device operation as
shown in the Applications section.
6
PWDN
Power-Down Interface. Connect pin to ground for normal operating mode. Connect pin to supply for power-
down mode; see Figure 5.
9
LOIM
Differential Local Oscillator (LO) Input Pin. Typically ac-coupled; see Figure 4.
10
LOIP
Differential Local Oscillator (LO) Input Pin. Typically ac-coupled; see Figure 4.
12
OUTM
Open-Collector Differential Output Pin. This pin needs to be dc-biased and (usually) ac-coupled; see Figure 3.
13
OUTP
Open-Collector Differential Output Pin. This pin needs to be dc-biased and (usually) ac-coupled; see Figure 3.
Rev. B | Page 6 of 32

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