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HSP45314(2000) データシートの表示(PDF) - Intersil

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HSP45314
(Rev.:2000)
Intersil
Intersil Intersil
HSP45314 Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
HSP45314
Absolute Maximum Ratings
Digital Supply Voltage DVDD to DGND . . . . . . . . . . . . . . . . . . +5.5V
Analog Supply Voltage AVDD to AGND . . . . . . . . . . . . . . . . . . +5.5V
Grounds, AGND To DGND. . . . . . . . . . . . . . . . . . . . . -0.3V To +0.3V
Digital Input Voltages . . . . . . . . . . . . . . . . . . . . . . . . . DVDD + 0.3V
Reference Input Voltage Range . . . . . . . . . . . . . . . . . . AVDD + 0.3V
Analog Output Current (IOUT) . . . . . . . . . . . . . . . . . . . . . . . . . 24mA
Thermal Information
Thermal Resistance (Typical, Note 1)
θJA(oC/W)
LQFP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
68
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .150oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
PARAMETER
AVDD = DVDD = +5V (unless otherwise noted), VREF = Internal 1.2V, IOUTFS = 20mA,
TA = 25oC for All Typical Values
HSP45314
TA = -40oC TO 85oC
TEST CONDITIONS
MIN TYP MAX
UNITS
DAC CHARACTERISTICS
DAC Resolution
14
-
-
Bits
Integral Linearity Error, INL
“Best Fit” Straight Line (Note 7)
-5
+2.5
+6
LSB
Differential Linearity Error, DNL
(Note 7)
-2
+1.5
+4
LSB
Offset Error, IOS
Offset Drift Coefficient
(Note 7)
(Note 7)
-0.025
+0.025 % FSR
-
0.1
-
ppm
FSR/oC
Full Scale Gain Error
With Internal Reference (Notes 2, 7)
-10
±1
+10 % FSR
Full Scale Gain Drift
With Internal Reference (Note 7)
-
±50
-
ppm
FSR/oC
Full Scale Output Current
(Note 3)
2
-
20
mA
Output Voltage Compliance Range (Note 3, 7)
-1.0
-
1.25
V
DAC DYNAMIC CHARACTERISTICS
Maximum Clock Rate, fCLK
Maximum Clock Rate, fCLK
Output Settling Time, (tSETT)
Output Rise Time
+5V DVDD, +5V AVDD (Note 3)
+3.3V DVDD, +5V AVDD (Note 3)
±0.05% (±8 LSB) (Note 7)
Full Scale Step
125
-
100
-
-
35
-
2.5
-
MSPS
-
MSPS
-
ns
-
ns
Output Fall Time
Full Scale Step
-
2.5
-
ns
Output Capacitance
-
25
-
pF
Output Noise
IOUTFS = 20mA
-
50
-
pA/ Hz
IOUTFS = 2mA
-
30
-
pA/ Hz
3-6

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