TC58NS256DC データシートの表示（PDF） - Toshiba

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TC58NS256DC

TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

Toshiba 

TC58NS256DC

Table 3. Command table (HEX)

First Cycle Second Cycle Acceptable while Busy

Serial Data Input

80



Read Mode (1)

00



Read Mode (2)

01



Read Mode (3)

50



Reset

FF



c

Auto Program

10



Auto Block Erase

60

D0

Status Read

70



c

ID Read

90



HEX data bit assignment

(Example)

Serial data input: 80H

10000000

I/O8 7 6 5 4 3 2 I/O1

Once the device has been set to Read mode by a 00H, 01H or 50H command, additional Read commands are

not needed for sequential page Read operations. Table 4 shows the operation states for Read mode.

Table 4. Read mode operation states

CLE

ALE

CE

WE

RE

I/O1~I/O8

Power

Output Select

L

L

L

H

L

Data output

Active

Output Deselect

L

L

L

H

H

High impedance

Active

Standby

L

L

H

H

*

High impedance

Standby

H: VIH, L: VIL, *: VIH or VIL

2000-08-27 17/33

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