CXD3017Q データシートの表示（PDF） - Sony Semiconductor
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CXD3017Q Datasheet PDF : 117 Pages
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CXD3017Q
Electrical Characteristics
1. DC Characteristics
Item
Input voltage (1)
Input voltage (2)
Input voltage (3)
Input voltage (4)
Output voltage (1)
Output voltage (2)
High level
Low level
High level
Low level
High level
Low level
High level
Low level
High level
Low level
Input leak current (1)
Input leak current (2)
Input leak current (3)
Input leak current (4)
Tri-state pin output leak current
(VDD = AVDD = 3.3 ± 0.3V, Vss = AVss = 0V, Topr = –20 to +75°C)
Conditions
Min.
Typ.
Max.
Unit
Applicable
pins
VIH1
VIL1
0.7VDD
0.2VDD
V
∗1, ∗9
V
VIH2
VIL2
VI ≤ 5.5V
0.8VDD
0.2VDD
V
∗2
V
VIH3
VI ≤ 5.5V
0.8VDD
VIL3
Schmitt input
VIN4
Analog input
VSS
0.2VDD
VDD
V
∗3
V
V ∗4, ∗5
VOH1
VOL1
IOH = –4mA
IOL = 4mA
VDD – 0.4
0
VDD
V ∗6, ∗8,
0.4
V ∗9
VOH2
VOL2
IOH = –0.28mA VDD – 0.5
IOH = 0.36mA
0
VDD
V
∗7
0.4
V
ILI1
VI = Vss or
VDD
–10
10
µA ∗1, ∗4
ILI2
VI = 0 to 5.5V –10
10
µA ∗2, ∗3
ILI3
VI = Vss or
VDD
–40
40
µA ∗9
ILI4
VI = 0.25VDD
to 0.75VDD
–40
40
µA ∗5
ILO
VI = Vss or
VDD
–40
40
µA ∗8
1-1. Applicable pins and classification
∗1 CMOS level input pins (1):
TEST, TES1
∗2 CMOS level input pins (2):
SYSM, DATA, XLAT, SSTP, XTSL
∗3 CMOS Schmitt input pins:
SQCK, XRST, CLOK, SCLK, SPOA, SPOB
∗4 Analog input pins (1):
ASYI, CLTV, FILI
∗5 Analog input pins (2):
VC, FE, SE, TE, CE, RFDC
∗6 Normal output pins (1):
SQSO, XLON, WFCK, XUGF, XPCK, GFS, C2PO, SCOR, SFDR, SRDR, TFDR, TRDR, FRDR, ASYO,
DOUT, LRCK, PCMD, BCK, EMPH, RMUT, LMUT
∗7 Normal output pin (2):
FILO
∗8 Tri-state output pins:
SENS, MDP, FFDR, PCO
∗9 Normal input/output pins:
ATSK, COUT, MIRR, DFCT, FOK, LOCK
Note) When the external pull-down resistors are connected to the pins ∗2 and ∗3, the resistance applied to
these pins should be 5kΩ or less in total.
–7–
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