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MX663DW データシートの表示(PDF) - MX-COM Inc

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MX663DW
MX-COM
MX-COM Inc  MX-COM
MX663DW Datasheet PDF : 17 Pages
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Call Progress Decoder
7
MX663 Preliminary Information
4.3.2 Call Progress Detector: Signal Analyzer
The analyzer samples the call progress signal at 9.322kHz. An external Anti-Alias Filter can be configured
using the on-chip opamp. The frequency range, quality and consistency of the input signal is analyzed by this
functional block. To be classified as a call progress signal the input signal frequencies should lie between
340Hz and 700Hz, the signal to noise ratio must be 16dB or greater and the signal must be consistent over a
period of at least 145ms. These decode criteria are continuously monitored and the assessment is updated
every 7ms. See section 4.3.5.
Because the analyzer time samples the input signal (SIGIN), signals above the operating band (2300Hz) can
alias, appear inband, and therefore be detected. Accordingly, applying signals above (2300Hz) should be
avoided. Such signals may be inadvertently generated by other sources such as digital clocks, switching
power supply, crosstalk, etc.
4.3.3 620Hz Detector
The detector is designed to aid detection of "US Busy" tone. The bandwidth of the 620Hz Detector is 60Hz
and the signal must be consistent over a period of at least 145ms for detection to occur. This assessment is
updated every 55ms.
4.3.4 Control and Output Logic
This block categorizes the nature of the signal into various decoded output states and controls the four
outputs. See the Truth Table in section 4.3.7.
4.3.5 Level Detector and OPAMP
The OPAMP is configured as an amplifier with external components R1, R2, C4 and C5. The level detector
operates by measuring the level of the amplified input signal and comparing it with a preset threshold which is
defined inside the MX663 as shown in the gain calculations below.
The detector output goes to the Control and Output Logic block. The data output is gated with the level
detector's output. The data output is valid only if the level detector output is true. The level detector output
can be forced true by connecting IN+ to VBIAS and IN- to VSS through a 100kresistor. An interrupt is
produced if the output data changes state.
Gain Calculations:
1. Set gain so an input signal level is amplified above the threshold level of 250mVP-P.
Gain > 250mVPP
V IN
where VIN is the input signal level at C4 in mVP-P.
In simplified form to assist with component value selection:
1. DC Gain = -R2/R1
2. C5 and R2 form a low-pass filter to attenuate out of band signals applied to SIGIN. The low pass filter’s
band edge is determined by the following: The recommended R2 and C5’s component values are
selected so than
f(-3dB) = 3120Hz .
f(3dB)
=
2
1
π ⋅R2
C5
3. C4 is a DC blocking capacitor, large enough to avoid affecting the AC gain in the frequency band of
interest.
4. The following formula defines the ac gain as a function of frequency, R1, R2 and C5 component values.
AC gain, Av(f)
Av(f) =
R1
R2 1+ (2 ⋅ π ⋅ f R2 C5)2
4.3.6 Xtal/Clock Oscillator
If the on-chip Xtal oscillator is to be used, then external components X1, C1 and C2 are required. If an
external clock source is to be used, then it should be connected to the XTAL/CLOCK input pin and
the XTAL pin should be left unconnected.
© 1999 MX-COM Inc.
www.mxcom.com Tele: 800 638-5577 336 744-5050 Fax: 336 744-5054
Doc. # 20480165.003
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
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