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STV8162D(2009) データシートの表示(PDF) - STMicroelectronics

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STV8162D Datasheet PDF : 14 Pages
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STV8162
Power dissipation and layout indications
5
Power dissipation and layout indications
The power is mainly dissipated by the three device buffers. It can be calculated by the
equation:
P = (VIN1-VOUT1) x IOUT1 + (VIN2-VOUT2) x IOUT2 + (VIN3-VOUT3) x IOUT3
The following table lists the different RthJA values of these packages with or without a heat
sink and the corresponding maximum power dissipation assuming:
Maximum ambient temperature = 70° C
Maximum junction temperature = 140° C
Table 5. Power dissipation
Device
Heat Sink
RthJA in °C/W
PMAX in W
No
50
1.4
STV8162
Yes
t(s) No
STV8162D
Yes
15
56 to 40
32
4.6
1.25 to 1.75
2.2
duc Figure 8. Thermal resistance (junction-to-ambient) of DIP18 package without heatsink
Pro To optimize the thermal conductivity of the copper
te 60
layer and the exchanges with the air, the solder
must cover the maximum amount of this area.
ole 55
s Test Board with
b 50
“On Board” square heat sink area.
- O 45
t(s) 40
0
2
4
6
8
10 12
uc Copper area (cm²) (35 µm plus solder) Board is face-down
Obsolete Prod Figure 9. Metal plate mounted near STV8162D for heatsinking
Top View
Bottom View
9/14

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