ST7573 データシートの表示（PDF） - Sitronix Technology Co., Ltd.
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ST7573 Datasheet PDF : 46 Pages
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ST7573
RWR
ERD
D7…D0
Read/Write execution control pin (PS[0:1]=[L:H]).
PS2 MPU type
RWR
Description
Read/Write control input pin
H 6800-series R/W R/W=“H”: read;
I
R/W=“L”: write.
1
Write enable clock input pin
L 8080-series /WR The data on D0 to D7 are latched at
the rising edge of the /WR signal.
When in the serial interface, left it connected to VDD.
Read/Write execution control pin (PS[0:1]=[L:H]).
PS2 MPU Type /RD(E)
Description
Read/Write control input pin
R/W=“H”: When E is “H”, D0 to D7
are in an output status;
H 6800-series
E
R/W=“L”: The data on D0 to D7 are
I
1
latched at the falling edge of the E
signal.
Read enable clock input pin.
L 8080-series /RD When /RD is “L”, D0 to D7 are in an
output status.
When in the serial interface, left it connected to VDD.
When using 8-bit parallel interface: 6800, 8080
8-bit bi-directional data bus that is connected to the standard 8-bit
microprocessor data bus.
When chip select is not active, D0 to D7 is high impedance.
When using serial interface: 4-LINE
D0: serial input clock (SCLK);
D1, D2, D3: serial input data (SDA), must be connected together;
I/O
8
D4~D7 must be connected to VDD (not used).
When chip select is not active, D0 to D7 is high impedance.
When using serial interface: 3-LINE
D0: serial input clock (SCLK).
D1, D2, D3: serial input data (SDA), must be connected together;
D4~D7 must be connected to VDD (not used).
When chip select is not active, D0 to D7 is high impedance.
Ver 1.0b
8/46
2007/07/12
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