LA2650 データシートの表示（PDF） - SANYO -> Panasonic

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LA2650

Bass boost IC

SANYO -> Panasonic 

LA2650

Recommended Data Transfer Procedure

The boost gain select and the left and right channel boost add on/off settings should only be set at power on. During

normal operation, control the device by setting the add level select and boost on/off settings. Using the add level select

and boost on/off settings for control is superior from the standpoint of minimizing switching noise (spikes).

Limiter (ALC) Operation

• The level limiter operates when the boost gain amplifier output level reaches about 2 V rms, and suppress further level

increases above that point.

• The non-clipping limiter operates to prevent boost gain amplifier output clipping at power-supply voltages (about 8.5 V

and lower) at which the output cannot be amplified to the operating level of the level limiter.

• Notes on Control Data

Enable

Data

Clock

— Data is read in on the rising edge of the clock signal.

— Data consists of 8 bits, D1 through D8.

— The input data is latched on the rising edge of the enable signal.

— When the LA2650 is not being controlled, the clock and the enable signal must be held high.

— Intervals between commands

The timing of the intervals on the enable signal must meet the conditions shown in the figure below.

Enable

At least 10 µs

• Initial Settings at Power on

— All data is reset to low when power is first applied.

— Applications should send their initial data settings once the IC is fully operational after power is applied, i.e. about

0.5 second after power is applied.

• Data Timing

Timing characteristics

Enable clock delay time

Data clock delay time

Clock high-level hold time

Clock low-level hold time

Clock enable delay time

Clock cycle time

min typ max unit

tec

5

µs

tdc

5

µs

tch

5

µs

tcl

5

µs

tce

5

µs

tck

10

µs

Enable

Data

Clock

tdc

tec

tch

tcl

tck

tce

No. 5652-10/13

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