SAA7113 データシートの表示（PDF） - Philips Electronics

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SAA7113

9-bit video input processor

Philips Electronics 

Philips Semiconductors

9-bit video input processor

Product specification

SAA7113H

7 PINNING

SYMBOL PIN

AI22

1

VSSA1

2

VDDA1

3

AI11

4

AI1D

5

AGND

AI12

TRST

AOUT

VDDA0

VSSA0

VPO7 to

VPO4

6

7

8

9

10

11

12 to 15

VSSDE1

LLC

VDDDE1

VPO3 to

VPO0

16

17

18

19 to 22

SDA

23

SCL

24

RTCO

25

RTS0

26

RTS1

27

VSSDI

28

VDDDI

29

VSSDA

30

XTAL

31

I/O/P

DESCRIPTION

I analog input 22

P ground for analog supply voltage channel 1

P positive supply voltage for analog channel 1 (+3.3 V)

I analog input 11

I differential analog input for AI11 and AI12; has to be connected to ground via a

capacitor; see application diagram of Fig.31

P analog signal ground connection

I analog input 12

I test reset input (active LOW), for boundary scan test; notes 1, 2 and 3

O analog test output; for testing the analog input channels, 75 Ω termination possible

P positive supply voltage (+3.3 V) for internal Clock Generation Circuit (CGC)

P ground for internal clock generation circuit

O digital VPO-bus output signal; higher bits of the 8-bit output bus. The output data

types of the VPO-bus are controlled via I2C-bus registers LCR2 to LCR24;

see Table 4. If I2C-bus bit VIPB = 1, the higher bits of the digitized input signal are

connected to these outputs, configured by the I2C-bus control signals

MODE3 to MODE0

P ground 1 or digital supply voltage input E (external pad supply)

O line-locked system clock output (27 MHz)

P digital supply voltage E1 (external pad supply 1; +3.3 V)

O digital VPO-bus output signal; lower bits of the 8-bit output bus. The output data types

of the VPO-bus are controlled via I2C-bus registers LCR2 to LCR24; see Table 4.

If I2C-bus bit VIPB = 1, the lower bits of the digitized input signal are connected to

these outputs, configured by the I2C-bus control signals MODE3 to MODE0

I/O serial data input/output (I2C-bus) 5 V-compatible

I serial clock input (I2C-bus) 5 V-compatible

(I/)O

(I/)O

I/O

real-time control output: contains information about actual system clock frequency,

field rate, odd/even sequence, decoder status, subcarrier frequency and phase and

PAL sequence (see external document “RTC Functional Description”, available on

request); the RTCO pin is enabled via I2C-bus bit OERT; this pin is also used as an

input pin for test purposes and has an internal pull-down resistor; do not

connect any pull-up resistor to this pin

real-time signal output 0: multi functional output, controlled by I2C-bus bits

RTSE03 to RTSE00; see Table 49. RTS0 is strapped during power-on or CE driven

reset, defines which I2C-bus slave address is used; 0 = 48H for write, 49H for read,

external pull-down resistor of 3.3 kΩ is needed; 1 = 4AH for write, 4BH for read,

default slave address (default, internal pull-up)

real-time signal I/O terminal 1: multi functional output, controlled by I2C-bus bit

RTSE13 to RTSE10; see Table 50

P ground for internal digital core supply

P internal core supply (+3.3 V)

P digital ground for internal crystal oscillator

O second terminal of crystal oscillator; not connected if external clock signal is used

1999 Jul 01

6

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