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RTH010 データシートの表示(PDF) - Unspecified

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RTH010 Datasheet PDF : 11 Pages
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RTH010 DATA SHEET REV F
TH2 and the output is only 10-bit accurate
during the latter part of half a clock cycle.
Lower limits for the sampling rates of TH1 and
TH2 are set by single-ended hold-mode droop
rates, and lead to the specification of maximum
hold times (thold1,max and thold2,max). For
longer hold times, the DTH must be allowed
sufficient recovery time during track phase (or a
sequence of track phases), so it can return to
normal operation mode. The bandwidth of
subsequent circuitry can be minimal if TH2 is
clocked at its lowest recommended frequency,
100 MHz. Since TH1 should be clocked at least
at 200 MHz, and possibly faster to meet jitter
Signal Descriptions
The RTH010 inputs are terminated on-chip with
50 to GND. This automatically protects
against off-chip high-impedance high-voltage
disturbances. The absolute maximum rated
voltage at input termination resistors is ±1 V, at
20 mA current. The RTH010 is designed for 1-
Vpp differential input signals, and can accept
common-mode offsets up to ±100 mV. If
operated in single-ended mode, terminate the
complementary input off-chip with 50 to the
same common mode as the driven input. The
single-ended FSR is half that of the differential
FSR. Distortion in the single-ended mode can be
up to 6 dB higher than in differential mode, and
differential input should be used for optimal
performance. The INP and INN inputs are
equivalent, except for the polarity of their effect
on OUTP and OUTN.
All four clock input signals are terminated on-
chip with 50 to GND. For lowest clock source
jitter, use a sinusoidal clock source. Use
differential clock signals for optimal
performance. Large CLK1(B) amplitude benefits
aperture jitter performance, small CLK1(B) and
CLK2(B) amplitudes minimizes distortion due to
clock feed-through in the higher clock frequency
range (500 to 1000 MHz). Independent of the
clock waveform, clock slew rates < 2 V/ns are
recommended to minimize clock feed-through
requirements, CLK1(B) and CLK2(B) can be
chosen different, as long as they are locked to
each other with a proper phase relationship.
Minimum required single-pole bandwidth at the
output for 10-bit precision is (10ln2/2π) x fCLK2, or
approximately 1.1fCLK2. In practice, <200 MHz
bandwidth of subsequent circuitry would be
sufficient, if fCLK2 is 100 MHz.
One digital input, Track Mode Select (TMS), is
provided to put both TH’s in track mode,
independent of the clock signals. The bandwidth
of the DTH is substantially lower in this mode
than in the sampled mode. The TMS is useful for
low sample-rate operation, including DC testing
related distortion. In case of single-ended
clocking the complementary input(s) can be
terminated directly to GND (lowest noise, clock
waveform distortion is not critical). Distortion for
single-ended clocks can be several dB higher
than for differential clocks, and differential clocks
should be used for optimal performance.
The track-mode select, TMS, can simply be left
open for the (default) sampled-mode operation
of the RTH010. Grounding the TMS puts both
track-and-holds, TH1 and TH2, in track-mode. In
this state, the TMS draws up to 0.75 mA of
current.
Due to its highly differential design, the RTH010
requires relatively modest power supply
decoupling. The 0.01 µF capacitors VEE-to-
GND and VEE-to-VCC (Figure 4) should be
placed as close to the package as possible.
Larger low frequency power supply decoupling
capacitors, VEE-to-GND and VCC-to-GND,
should be placed within 1 inch of the RTH010.
Depending on the expected noise on the
supplies more capacitors in parallel may need to
be used. With low-impedance supplies that are
very quiet (no digital circuitry), the RTH010 can
also perform well with no external decoupling at
all.
The product specifications contained in this data sheet are subject to change. Rockwell Scientific Company reserves the right to make changes to its product
specifications at any time without notice. The information furnished herein is believed to be accurate; however, no responsibility is assumed for its use.
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