R5F212E2NXXXFP データシートの表示（PDF） - Renesas Electronics

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R5F212E2NXXXFP

RENESAS MCU R8C FAMILY / R8C/2x SERIES

Renesas Electronics 

Table of Contents

SFR Page Reference ........................................................................................................................... B - 1

1. Overview ......................................................................................................................................... 1

1.1 Features ..................................................................................................................................................... 1

1.1.1 Applications .......................................................................................................................................... 1

1.1.2 Specifications ........................................................................................................................................ 2

1.2 Product List ............................................................................................................................................... 6

1.3

Block Diagram ......................................................................................................................................... 8

1.4 Pin Assignment .......................................................................................................................................... 9

1.5 Pin Functions ........................................................................................................................................... 11

2. Central Processing Unit (CPU) ..................................................................................................... 12

2.1 Data Registers (R0, R1, R2, and R3) ...................................................................................................... 13

2.2 Address Registers (A0 and A1) ............................................................................................................... 13

2.3 Frame Base Register (FB) ....................................................................................................................... 13

2.4 Interrupt Table Register (INTB) .............................................................................................................. 13

2.5 Program Counter (PC) ............................................................................................................................. 13

2.6

2.7

2.8

2.8.1

2.8.2

2.8.3

User Stack Pointer (USP) and Interrupt Stack Pointer (ISP) .................................................................. 13

Static Base Register (SB) ........................................................................................................................ 13

Flag Register (FLG) ................................................................................................................................ 13

Carry Flag (C) ..................................................................................................................................... 13

Debug Flag (D) ................................................................................................................................... 13

Zero Flag (Z) ....................................................................................................................................... 13

2.8.4 Sign Flag (S) ....................................................................................................................................... 13

2.8.5 Register Bank Select Flag (B) ............................................................................................................ 13

2.8.6 Overflow Flag (O) .............................................................................................................................. 13

2.8.7

2.8.8

2.8.9

2.8.10

Interrupt Enable Flag (I) ..................................................................................................................... 14

Stack Pointer Select Flag (U) .............................................................................................................. 14

Processor Interrupt Priority Level (IPL) ............................................................................................. 14

Reserved Bit ........................................................................................................................................ 14

3. Memory ......................................................................................................................................... 15

3.1 R8C/2E Group ......................................................................................................................................... 15

3.2 R8C/2F Group ......................................................................................................................................... 16

4. Special Function Registers (SFRs) ............................................................................................... 17

5. Resets ........................................................................................................................................... 24

5.1 Hardware Reset ....................................................................................................................................... 27

5.1.1 When Power Supply is Stable ............................................................................................................. 27

5.1.2 Power On ............................................................................................................................................ 27

5.2 Power-On Reset Function ....................................................................................................................... 29

5.3 Voltage Monitor 1 Reset ......................................................................................................................... 30

5.4 Voltage Monitor 2 Reset ......................................................................................................................... 30

5.5 Watchdog Timer Reset ............................................................................................................................ 30

5.6 Software Reset ......................................................................................................................................... 30

6. Voltage Detection Circuit .............................................................................................................. 31

6.1 VCC Input Voltage .................................................................................................................................. 36

A-1

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