R5F21264JFP データシートの表示（PDF） - Renesas Electronics

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R5F21264JFP

SINGLE-CHIP 16-BIT CMOS MCU

Renesas Electronics 

Table of Contents

SFR Page Reference ........................................................................................................................... B - 1

1. Overview ......................................................................................................................................... 1

1.1 Applications ............................................................................................................................................... 1

1.2 Performance Overview .............................................................................................................................. 2

1.3 Block Diagram .......................................................................................................................................... 4

1.4 Product Information .................................................................................................................................. 5

1.5 Pin Assignments ........................................................................................................................................ 9

1.6 Pin Functions ........................................................................................................................................... 10

2. Central Processing Unit (CPU) ..................................................................................................... 12

2.1 Data Registers (R0, R1, R2, and R3) ...................................................................................................... 13

2.2 Address Registers (A0 and A1) ............................................................................................................... 13

2.3 Frame Base Register (FB) ....................................................................................................................... 13

2.4 Interrupt Table Register (INTB) .............................................................................................................. 13

2.5 Program Counter (PC) ............................................................................................................................. 13

2.6 User Stack Pointer (USP) and Interrupt Stack Pointer (ISP) .................................................................. 13

2.7 Static Base Register (SB) ........................................................................................................................ 13

2.8 Flag Register (FLG) ................................................................................................................................ 13

2.8.1 Carry Flag (C) ..................................................................................................................................... 13

2.8.2 Debug Flag (D) ................................................................................................................................... 13

2.8.3 Zero Flag (Z) ....................................................................................................................................... 13

2.8.4 Sign Flag (S) ....................................................................................................................................... 13

2.8.5 Register Bank Select Flag (B) ............................................................................................................ 13

2.8.6 Overflow Flag (O) .............................................................................................................................. 13

2.8.7 Interrupt Enable Flag (I) ..................................................................................................................... 14

2.8.8 Stack Pointer Select Flag (U) .............................................................................................................. 14

2.8.9 Processor Interrupt Priority Level (IPL) ............................................................................................. 14

2.8.10 Reserved Bit ........................................................................................................................................ 14

3. Memory ......................................................................................................................................... 15

3.1 R8C/26 Group ......................................................................................................................................... 15

3.2 R8C/27 Group ......................................................................................................................................... 16

4. Special Function Registers (SFRs) ............................................................................................... 17

5. Resets ........................................................................................................................................... 24

5.1 Hardware Reset ....................................................................................................................................... 28

5.1.1 When Power Supply is Stable ............................................................................................................. 28

5.1.2 Power On ............................................................................................................................................ 28

5.2 Power-On Reset Function ....................................................................................................................... 30

5.3 Voltage Monitor 0 Reset (N, D Version) ................................................................................................ 32

5.4 Voltage Monitor 1 Reset (N, D Version) ................................................................................................ 32

5.5 Voltage Monitor 1 Reset (J, K Version) .................................................................................................. 32

5.6 Voltage Monitor 2 Reset ......................................................................................................................... 33

5.7 Watchdog Timer Reset ............................................................................................................................ 33

5.8 Software Reset ......................................................................................................................................... 33

A-1

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