MC74VHC595DR2 データシートの表示（PDF） - ON Semiconductor

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MC74VHC595DR2

8-Bit Shift Register with Output Storage Register (3-State)

ON Semiconductor 

TIMING REQUIREMENTS (Input tr = tf = 3.0ns)

Symbol

Parameter

tsu(L) Setup Time, SCLR to RCK

th

Hold Time, SI to SCK

th(L) Hold Time, SCLR to RCK

trec Recovery Time, SCLR to SCK

tw

Pulse Width, SCK or RCK

tw(L) Pulse Width, SCLR

MC74VHC595

VCC

V

Typ

3.3

5.0

3.3

5.0

3.3

5.0

3.3

5.0

3.3

5.0

3.3

5.0

Limit

8.0

5.0

1.5

2.0

0

0

3.0

2.5

5.0

5.0

5.0

5.0

Limit

9.0

5.0

1.5

2.0

0

0

3.0

2.5

5.0

5.0

5.0

5.0

Limit

Unit

9.0

ns

5.0

1.5

ns

2.0

1.0

ns

1.0

3.0

ns

2.5

5.0

ns

5.0

5.0

ns

5.0

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