PCF8811 データシートの表示（PDF） - Philips Electronics

部品番号

コンポーネント説明

一致するリスト

PCF8811

80×128 pixels matrix LCD driver

Philips Electronics 

Philips Semiconductors

80 × 128 pixels matrix LCD driver

Product specification

PCF8811

7.10 VOS4 to VOS0

These 5 input pins enable the calibration of the

programmed VLCD (can be connected on the module to

VDD1 or VSS1).

7.11 EXT: extended command set

Input to select the basic command set or the extended

command set. Must be connected on the module to have

only one command set enabled.

Table 1 Command set

PIN

EXT

LEVEL

LOW

HIGH

DESCRIPTION

basis command set

extended command set

Note: Philips strongly recommends that the extended

command set be used.

7.12 PS0, PS1 and PS2

Parallel/serial/I2C-bus interface selection.

Table 2 Interface selection

PS[2:0]

000

001

010

011

100 or 110

101 or 111

INTERFACE

3-line SPI

4-line SPI

no operation

6800 parallel interface

high-speed I2C-bus

interface

3-line serial interface

7.13 D/C

Input to select either command/data or data input. Not

used in the 3-line serial interface, 3-line SPI and I2C-bus

interface and must be connected to VDD1 or VSS1.

7.14 R/W

Input to select read or write mode when the 6800 parallel

interface is selected. Not used in the serial and I2C-bus

mode and must be connected to VDD1 or VSS1.

7.15 E

E is the clock enable input for the 6800 parallel bus. Not

used in the serial or I2C-bus interface and must be

connected to VDD1 or VSS1.

7.16 SCLH/SCE

Input to select the chip and so allowing data/commands to

be clocked in or serial clock input when the I2C-bus

interface is selected.

7.17 SDAH

I2C-bus serial data input. When not used it must be

connected to VDD1 and VSS1.

7.18 SDAHOUT

SDAHOUT is the serial data acknowledge output for the

I2C-bus interface. By connecting SDAHOUT to SDAH

externally, the SDAH line becomes fully I2C-bus

compatible. Having the acknowledge output separated

from the serial data line is advantageous in COG

applications. In COG applications where the track

resistance from the SDAHOUT pad to the system SDAH

line can be significant, a potential divider is generated by

the bus pull-up resistor and the ITO track resistance. It is

possible that during the acknowledge cycle the PCF8811

will not be able to create a valid logic 0 level. By splitting

the SDAH input from the SDAHOUT output the device

could be used in a mode that ignores the acknowledge bit.

In COG applications where the acknowledge cycle is

required, it is necessary to minimize the track resistance

from the SDAHOUT pad to the system SDAH line to

guarantee a valid low level. When not used it must be

connected to VDD1 or VSS1.

7.19 DB7 to DB0

These input/output lines are used by the several interfaces

as described below. When not used in the serial interface

or the I2C-bus interface it must be connected to VDD1 or

VSS1.

7.19.1 DB7 TO DB0 (PARALLEL INTERFACE)

8-bit bidirectional bus. DB7 is the MSB.

7.19.2 DB7, DB6 AND DB5 (SERIAL INTERFACE)

DB7 is used for serial input data (SDATA) when the serial

interface is selected. DB6 (SCLK) is used for the serial

input clock when the serial interface is selected. DB5 is

used as the serial output of the serial interface (SDO).

7.19.3 DB3 AND DB2 (I2C-BUS INTERFACE)

DB3 and DB2 are respectively the SA1 and SA0 inputs

when the I2C-bus interface is selected and can be used so

that up to four PCF8811s can be distinguished on one

I2C-bus interface.

2004 May 17

7

Share Link: