PCF210AA データシートの表示（PDF） - NXP Semiconductors.
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PCF210AA Datasheet PDF : 63 Pages
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NXP Semiconductors
PCF2123
SPI Real time clock/calendar
250
IDD(1)
(nA)
210
001aai558
170
130
90
50
0
20
40
60
80
100
Rs(2) (kΩ)
Configuration: CLKOUT disabled, VDD = 3 V, timer clock set to 1⁄60 Hz.
(1) IDD (nA) minimum power mode.
(2) Maximum value for RS is 100 kΩ.
Fig 5. IDD with respect to quartz RS
8.1.2 Power consumptions with respect to timer mode
Four source clocks are possible for the timer. The 4.096 kHz source clock will add the
greatest part to the power consumption. The selection of 64 Hz, 1 Hz, or 1⁄60 Hz will be
almost indistinguishable and add very little.
400
IDD(1)
(nA)
300
200
100
001aai559
(2)
(3)
PCF2123
Product data sheet
0
0
2
4
Configuration: CLKOUT disabled, quartz RS = 15 kΩ.
(1) IDD (nA) minimum power mode.
(2) Timer clock = 4 kHz.
(3) Timer clock = 64 Hz, 1 Hz, 1⁄60 Hz.
Fig 6. IDD with respect to timer clock selection
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 27 April 2011
6
VDD (V)
© NXP B.V. 2011. All rights reserved.
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