![](/html/Allegro/55530/page3.png)
6A259
8-BIT ADDRESSABLE
DMOS POWER DRIVER
S0
(LSB)
S1
S2
(MSB)
LOGIC
SUPPLY
LOGIC
GROUND
V DD
DATA
ENABLE
(ACTIVE LOW)
CLEAR
(ACTIVE LOW)
FUNCTIONAL BLOCK DIAGRAM
D
C1
CLR
D
C1
CLR
D
C1
CLR
D
C1
CLR
D
C1
CLR
D
C1
CLR
D
C1
CLR
D
C1
CLR
Power grounds must be connected externally to a single point.
www.allegromicro.com
OUT 0
OUT 1
OUT 2
OUT 3
OUT 4
OUT 5
OUT 6
OUT 7
POWER
GROUND
Dwg. FP-047-2