P4C163-25CMBLF データシートの表示（PDF） - Semiconductor Corporation
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P4C163-25CMBLF Datasheet PDF : 12 Pages
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P4C163/163L
AC CHARACTERISTICS—WRITE CYCLE
(VCC = 5V ± 10%, All Temperature Ranges)(2)
Symbol
tWC
tCW
tAW
tAS
tWP
tAH
tDW
tDH
tWZ
tOW
Parameter
Write Cycle Time
Chip Enable
Time to End of Write
Address Valid to
End of Write
Address Set-up Time
Write Pulse Width
Address Hold Time
Data Valid to End
of Write
Data Hold Time
Write Enable to
Output in High Z
Output Active
from End of Write
-25
-35
-45
Min Max Min Max Min Max Unit
25
35
45
ns
18
25
33
ns
18
25
33
ns
0
0
0
ns
18
20
25
ns
0
0
0
ns
13
15
20
ns
0
10
0
14
0
ns
18 ns
3
5
5
ns
WRITE CYCLE NO. 1 (WE CONTROLLED)(11)
Notes:
11. CE1 and WE must be LOW, and CE2 HIGH for WRITE cycle.
12. OE is LOW for this WRITE cycle to show tWZ and tOW.
13. If CE1 goes HIGH, or CE2 goes LOW, simultaneously with WE
HIGH, the output remains in a low impedance state.
14. Write Cycle Time is measured from the last valid address to the first
transitioning address.
Document # SRAM120 REV C
Page 6 of 12
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